Soft Repair Circuit for Secure Memory Cell Replacement
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Solution Overview
Problem
As memory device capacity increases, it becomes challenging to fabricate devices without defective memory cells, necessitating post-package repair operations to address defects detected after packaging, with existing methods offering temporary or permanent repair solutions that may not adequately secure data storage.
Innovation Solution
A method involving a soft post-package repair operation in a memory device, where normal memory cells are temporarily replaced with redundant cells for secure data storage, allowing for secure data writing and recovery, utilizing a soft repair circuit that enters and exits a repair mode to manage the replacement and cancellation of defective cells with redundant ones.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory device capacity increases, then storage capability is improved, but the likelihood of defective memory cells increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring redundant memory cells alongside normal memory cells during fabrication. These redundant cells are prepared in advance to replace defective cells that may occur during or after manufacturing, allowing the memory device to maintain reliability even as capacity increases.
Solution Approach 2:
The patent changes the operational state of redundant memory cells from inactive to active through a repair mode. By controlling the repair mode parameter, the system can dynamically switch between using normal memory cells and redundant memory cells, allowing flexible adaptation when defects are detected.
2Reliability
If post-package repair operation is performed, then defective memory cells are replaced, but data security is compromised
Solution Approach 1:
The patent extracts secure data from the normal memory cell address space and stores it in a separate secure region within the redundant memory cells. This physical separation ensures that even when repair operations are performed, the secure data remains isolated and protected from unauthorized access or accidental modification.
Solution Approach 2:
The patent introduces a repair mode as an intermediary state that controls access to redundant memory cells. When repair mode is activated, the system can safely perform repair operations while the secure region remains protected. The repair mode acts as a mediator that allows necessary repairs while maintaining data security through controlled access.
3Loss of information
If redundant memory cells are used for secure data storage, then data security is improved, but access complexity increases
Solution Approach 1:
The patent merges the secure data storage function with the existing redundant memory cell structure. Instead of creating a completely separate secure storage system, the invention utilizes the already-present redundant cells, combining security functionality with the repair mechanism. This reduces overall system complexity while maintaining security.
Solution Approach 2:
The patent makes the redundant memory cells universal by enabling them to serve dual purposes: replacing defective normal memory cells during repair operations and storing secure data when repair mode is activated. This multi-functionality eliminates the need for separate dedicated secure storage hardware, simplifying the overall system architecture.
4Adaptability or versatility
If soft post-package repair operation is used, then repair flexibility is improved, but permanent repair capability is lost
Solution Approach 1:
The patent implements a dynamic repair system where the repair mode can be activated or deactivated as needed. When repair mode is on, redundant memory cells are used for repairs and secure data storage. When repair mode is off, the system operates normally. This dynamic control provides flexibility while allowing the system to maintain permanent repair effects when needed by simply keeping repair mode activated.
Data Source
AI summary
A memory system includes: a memory device; and a memory controller suitable for controlling the memory device, and the memory device includes: a plurality of normal memory cells; a plurality of redundant memory cells; and a soft repair circuit suitable for replacing a portion of normal memory cells among the plurality of the normal memory cells with the plurality of the redundant memory cells, and the memory controller controls the soft repair circuit to repair the portion of the normal memory cells among the plurality of the normal memory cells with the plurality of the redundant memory cells, commands the memory device to write a secure data in the plurality of the redundant memory cells, and controls the soft repair circuit to recover the repairing of the portion of the normal memory cells with the plurality of the redundant memory cells.