Soft-start Control Circuit for DC-DC Converter Inrush Current

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Solution Overview

Problem

Conventional soft-start control circuits in DC-DC converting systems for displays fail to avoid inrush current during startup processes due to the non-fixed order of high-level and low-level output voltage enable signals, leading to poor power management.

Innovation Solution

A soft-start control circuit incorporating comparators, D-type flip-flops, inverters, and a NOR gate is used to manage the startup process of a single-inductor dual-output DC-DC converting system, ensuring no inrush current by controlling the timing and enable signals of high-level and low-level output voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional soft-start control circuits are used in DC-DC converting systems, then the system can operate with high-level and low-level output voltages, but inrush current occurs during startup processes due to non-fixed order of enable signals

Engineering Contradiction:
Improvestartup stabilityVSAvoidinrush current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by detecting the startup state of the DC-DC converting system before the actual voltage output begins. The detection circuit checks whether the system is in a startup state, and only enables the soft-start control when startup is detected. This preliminary detection prevents inrush current by ensuring the soft-start mechanism is activated at the correct moment, resolving the contradiction between maintaining operational reliability and preventing harmful inrush current.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If the enable signals for high-level and low-level output voltages are allowed to activate in any order, then the system has flexible power management, but inrush current cannot be avoided during startup

Engineering Contradiction:
Improvepower management flexibilityVSAvoidinrush current
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent implements feedback by using a detection circuit that continuously monitors the startup state of the DC-DC converting system. The detection circuit provides feedback information about whether the system is in a startup state, which then controls the activation of the soft-start control mechanism. This feedback loop maintains power management flexibility while preventing inrush current by dynamically adjusting the soft-start activation based on real-time system state detection.

Inventive Principle:
Principle #23Feedback

3Object-generated harmful factors

If soft-start control is activated during all startup processes, then inrush current is prevented, but unnecessary control intervention occurs when not needed

Engineering Contradiction:
Improveinrush current preventionVSAvoidunnecessary control activation
Core Design Contradiction:
Object-generated harmful factorsVSLoss of energy

Solution Approach 1:

The patent applies preliminary action through a detection circuit that checks whether the DC-DC converting system is actually in a startup state before activating soft-start control. This preliminary detection ensures the soft-start mechanism is only activated when necessary, preventing both inrush current and unnecessary control intervention. The detection circuit evaluates system state parameters and only enables soft-start control when startup conditions are met, thereby avoiding wasted energy from unnecessary activation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10541599B2Soft-start control circuit applied to DC-DC converting system
Publication Date: 2020.01.21 RAYDIUM SEMICON
  • US10541599B2 patent drawing
  • US10541599B2 patent drawing
  • US10541599B2 patent drawing

AI summary

A soft-start control circuit includes first to third inverters, first to third comparators, first to fourth resistors, first to fourth D-type flip-flops and a NOR gate. The first comparator outputs a first trigger signal. The second comparator outputs a second trigger signal. The third comparator outputs a third trigger signal. The first D-type flip-flop outputs a first error amplification ready signal. The second D-type flip-flop outputs a second error amplification ready signal. The third D-type flip-flop outputs a high-level output voltage ready signal. The fourth D-type flip-flop outputs a low-level output voltage ready signal. The NOR gate receives an inverted signal of a high-level output voltage enable signal and the third trigger signal and outputs a high-level output voltage control signal to prevent an inrush current of the DC-DC conversion system during a startup process.