Software DMA Manager for Chiplet Network Congestion
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Solution Overview
Problem
Conventional processors face inefficiencies in managing direct memory access (DMA) operations due to limited hardware capabilities, particularly in distributed architectures like chiplet-based systems, where network congestion and resource contention hinder optimal DMA throughput.
Innovation Solution
Implementing software-managed coordination of DMA transfer commands across multiple processors and DMA engines, allowing for dynamic routing and splitting of tasks based on runtime resource availability and network congestion, without requiring changes to individual DMA engine capabilities or hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional hardware-based DMA management is used, then device complexity is reduced, but DMA throughput and bandwidth utilization deteriorate due to network congestion and resource contention
Solution Approach 1:
The patent replaces the conventional hardware-based DMA management mechanism with a software-based management system. The DMA manager, implemented as software running on the host processor, dynamically allocates DMA engines, manages command queues, and routes transfer commands based on runtime system state. This substitution allows flexible, adaptive DMA resource management that can respond to network congestion and resource contention, thereby improving DMA throughput without requiring changes to the underlying DMA engine hardware.
2Productivity
If DMA engines are upgraded to handle congestion, then DMA throughput is improved, but device complexity and cost increase
Solution Approach 1:
The patent introduces dynamic resource allocation and routing of DMA transfer commands based on runtime system conditions. The DMA manager monitors system state, including network congestion and DMA engine availability, and dynamically adjusts command routing decisions. This dynamic approach allows the system to optimize DMA throughput under varying load conditions without requiring enhanced hardware capabilities in individual DMA engines.
Solution Approach 2:
The patent introduces a DMA manager as an intermediary software layer between the application and the DMA engines. This intermediary manages the allocation and routing of DMA transfer commands, making intelligent decisions about which DMA engines to use based on current system state. The DMA manager acts as a mediator that optimizes resource utilization across multiple DMA engines, improving overall system throughput without requiring individual engines to be more capable.
3Productivity
If multiple DMA engines are coordinated, then bandwidth utilization is improved, but control complexity increases
Solution Approach 1:
The patent implements a universal DMA manager that handles multiple functions: allocating DMA engines to applications, routing transfer commands to appropriate engines, monitoring system state, and managing command queues. This single software component provides multi-functional control over all DMA engines in the system, simplifying the coordination complexity compared to having separate control mechanisms for each engine while maximizing bandwidth utilization through centralized intelligence.
Data Source
AI summary
A method for software management of DMA transfer commands includes receiving a DMA transfer command instructing a data transfer by a first processor device. Based at least in part on a determination of runtime system resource availability, a device different from the first processor device is assigned to assist in transfer of at least a first portion of the data transfer. In some embodiments, the DMA transfer command instructs the first processor device to write a copy of data to a third processor device. Software analyzes network bus congestion at a shared communications bus and initiates DMA transfer via a multi-hop communications path to bypass the congested network bus.