Software Forwarding in Passive Optical Networks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current industry practice in CCAP environments relies heavily on hardware solutions like TCAMs and FPGAs for downstream forwarding, which can be inflexible and costly to scale, especially when integrating with PON environments.
Innovation Solution
The proposed solution involves using multiple software cores to divide the functions of DOCSIS downstream MAC Layer forwarding, leveraging the Data Path Development Kit (DPDK) and its zero-locking rings to facilitate efficient packet processing across multiple CPU cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware solutions like TCAMs and FPGAs are used for downstream forwarding in CCAP environments, then forwarding performance and reliability are improved, but device cost and complexity increase
Solution Approach 1:
The patent replaces hardware-based forwarding mechanisms (TCAMs and FPGAs) with a software-based implementation running on general-purpose processors. The forwarding logic is implemented as executable instructions that can be loaded and configured dynamically, eliminating the need for specialized hardware components while maintaining forwarding functionality.
Solution Approach 2:
The patent changes the operational parameters of the forwarding system by transitioning from fixed hardware configurations to dynamic software configurations. This allows forwarding rules, classification criteria, and scheduling parameters to be modified at runtime without hardware reconfiguration, improving adaptability while reducing hardware complexity.
2Speed
If hardware solutions like TCAMs and FPGAs are used for downstream forwarding, then forwarding speed is improved, but scalability and flexibility deteriorate
Solution Approach 1:
The patent introduces dynamic configurability to the forwarding system through software-based implementation. Forwarding rules, classification parameters, and resource allocation policies can be dynamically adjusted at runtime to adapt to changing network conditions and service requirements, enabling both horizontal and vertical scalability without hardware limitations.
Solution Approach 2:
The software-based forwarding implementation can serve multiple functions and protocols through a unified architecture. The same forwarding engine handles DOCSIS traffic, PON traffic, and other network protocols, providing universal functionality that replaces multiple specialized hardware components and improves system versatility.
3Productivity
If multiple software cores are used for packet processing, then resource allocation efficiency is improved, but system complexity increases
Solution Approach 1:
The patent divides the packet processing workload across multiple software cores, with each core handling specific forwarding tasks or traffic flows. This segmentation enables parallel processing and improves resource utilization while distributing system complexity across manageable units rather than concentrating it in a single processing entity.
Solution Approach 2:
The patent introduces an intermediary layer (software abstraction layer) that manages communication and coordination between multiple processing cores. This intermediary handles tasks such as packet routing between cores, state synchronization, and load balancing, thereby managing inter-core complexity while maximizing resource allocation efficiency.
Data Source
AI summary
Approaches for processing packets transmitted within a Passive Optical Network (PON) using executable software. Processing packets within a PON may be performed by classifying one or more packets, of a plurality of received packets, to a particular PON system component, and then processing the one or more packets classified to the same PON system component on a single physical or virtual processor. The one or more packets may be forwarded between a sequence of one or more software stages. The software stages may each be configured to execute on separate logical cores or on a single logical core.


