Software FSP Decoding for Fast JPEG Padding Byte Removal
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Solution Overview
Problem
Current methods for decoding false sync code protection (FSP) in camera-phones are inefficient, particularly when handling JPEG data, as they require extensive byte-by-byte comparisons to remove padding bytes, leading to high processor instruction counts and increased bandwidth and memory requirements.
Innovation Solution
A method for FSP decoding that examines video data signals byte-by-byte to identify and remove padding bytes based on specific criteria, reducing the number of processor instructions needed from 141 to 4 by using a logical OR and AND combination of bytes to determine padding byte presence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If byte-by-byte comparison method is used to remove padding bytes, then decoding accuracy is maintained, but processor instruction count increases to 141 instructions and execution time increases
Solution Approach 1:
The patent segments the decoding process into two distinct phases: a fast filtering phase that processes bytes in groups using logical OR and AND operations to identify potential padding byte candidates, and a precise verification phase that uses byte-by-byte comparison only for candidate bytes. This segmentation allows the majority of bytes to be processed quickly while maintaining accuracy only where needed.
Solution Approach 2:
The patent introduces an intermediary verification step between the fast filtering phase and the final decoding decision. The logical OR and AND operations serve as an intermediary filter that narrows down potential padding bytes before the expensive byte-by-byte comparison is applied, thus reducing the overall computational burden while maintaining accuracy.
2Reliability
If extensive byte-by-byte comparisons are performed to identify padding bytes, then accurate removal is achieved, but processor load and execution time increase significantly
Solution Approach 1:
The patent performs preliminary filtering using logical OR and AND operations on groups of bytes before conducting the more time-consuming byte-by-byte comparison. This preliminary action identifies a small subset of candidate bytes that are likely to be padding bytes, allowing the verification process to focus only on these candidates rather than examining every byte in the data stream.
3Productivity
If simple padding removal method is used, then processor instructions are reduced to 4 instructions, but the method cannot distinguish between actual data bytes and padding bytes
Solution Approach 1:
The patent divides the byte processing into two segments: a bulk processing segment that uses efficient logical operations to filter candidates, and a precise verification segment that applies byte-by-byte comparison only to the filtered candidates. This segmentation enables the system to achieve high processing efficiency for the majority of bytes while maintaining high identification accuracy for the critical decision points.
Data Source
AI summary
This invention describes a false sync code protection (FSP) decoding technique by software for removing padding binary numbers from video data signals in electronic devices such as camera-phones. These padding binary numbers (e.g., a byte 101001012) are encoded in the video data signal. The invention describes a fast method for carrying out the decoding process using a predetermined criterion without need for separately comparing the received data using bit-by-bit process, and thus significantly reducing the number of processor instructions compared to the conventional bit-by-bit method. For the presented example these instructions are executed for every stand-alone zero byte found within e.g. JPEG data, which leads to considerable savings in execution time, especially if several JPEG images are taken and processed consecutively.