SOI Anti-Fuse Structure Using a Trap-Rich Layer
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Solution Overview
Problem
Existing semiconductor structures lack efficient integration of anti-fuse structures with other semiconductor devices, and there is a need for improved electron trapping capabilities for enhanced performance in memory and RF devices.
Innovation Solution
A semiconductor structure incorporating a trap rich layer on a SOI substrate with electrically conductive structures forms an anti-fuse structure, allowing for electron capture and resistance reduction through voltage application, enabling one-time programming and improved device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If anti-fuse structure is integrated with other semiconductor devices on SOI substrate, then manufacturing process is simplified and device performance is enhanced, but integration complexity and process compatibility requirements increase
Solution Approach 1:
The patent combines the anti-fuse structure formation with standard SOI device fabrication processes. The trap-rich layer is formed as part of the substrate preparation, and conductive structures are integrated during normal device manufacturing, allowing anti-fuse structures to be created without adding separate fabrication steps.
Solution Approach 2:
The trap-rich layer serves multiple functions: it provides electron trapping capability for anti-fuse operation, maintains compatibility with standard SOI processing, and can be integrated with various conductive structure configurations. This multi-functionality enables the same layer to support both anti-fuse structures and other semiconductor devices.
2Reliability
If trap rich layer is disposed between buried insulation layer and base substrate, then electron trapping capability is enhanced for anti-fuse operation, but structural complexity of SOI substrate increases
Solution Approach 1:
The trap-rich layer is positioned specifically between the buried insulation layer and base substrate only where anti-fuse structures are needed, rather than modifying the entire SOI substrate uniformly. This localized approach enhances electron trapping capability at the required locations while minimizing overall structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integration of the anti-fuse structure with other semiconductor devices simplifies the manufacturing process and significantly reduces electrical resistance, achieving stable one-time programming and enhanced operational performance in memory and RF applications.
Implementation Method 1
The trap rich layer is disposed between the buried insulation layer and the base substrate. At least a part of the first electrically conductive structure is disposed in the trap rich layer, at least a part of the second electrically conductive structure is disposed in the trap rich layer
Data Source
AI summary
A semiconductor structure includes a semiconductor on insulator (SOI) substrate, a first electrically conductive structure, and a second electrically conductive structure. The SOI substrate includes a base substrate, a buried insulation layer disposed on the base substrate, a semiconductor layer disposed on the buried insulation layer, and a trap rich layer disposed between the buried insulation layer and the base substrate. At least a part of the first electrically conductive structure and at least a part of the second electrically conductive structure are disposed in the trap rich layer. A part of the trap rich layer is disposed between the first electrically conductive structure and the second electrically conductive structure. The first electrically conductive structure, the second electrically conductive structure, and the trap rich layer disposed between the first electrically conductive structure and the second electrically conductive structure are at least a portion of an anti-fuse structure.