SOI Back Gate Formation Using Sacrificial Trench Cavities
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Solution Overview
Problem
Existing methods for producing back gates under semiconductive devices on silicon on isolator (SOI) substrates are complex and invasive, limiting integration density due to wide isolation trenches required for electrostatic control in quantum devices.
Innovation Solution
A method involving the formation of isolation trenches through a stack with a sacrificial layer, partial etching to form a cavity, and filling with conductive material to create a back gate, allowing for precise control of trench sizing and increased integration density by using a sacrificial coating layer and isolating material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wide isolation trenches are used to form back gates under individual devices, then electrostatic control of quantum devices is improved, but integration density is reduced
Solution Approach 1:
A sacrificial layer is introduced as an intermediary element between the isolation trench and the device. This sacrificial layer allows the isolation trench to extend closer to the device without directly impacting it, enabling better electrostatic control while maintaining device integrity. The sacrificial layer is selectively removed to form the back gate cavity, resolving the contradiction between trench width and device safety
Solution Approach 2:
The isolation trench formation process is segmented into multiple stages: first forming the trench with sacrificial layer protection, then selectively removing the sacrificial layer to create the back gate cavity. This segmentation allows precise control over the final trench dimensions and back gate positioning, achieving both good electrostatic control and high integration density
2Reliability
If complex back face methods are used to produce conductive back gates, then electrostatic control is improved, but manufacturing complexity increases
Solution Approach 1:
The sacrificial layer is deposited in advance during the isolation trench formation process, before the back gate cavity needs to be created. This preliminary action integrates the back gate formation into the existing manufacturing flow, avoiding the need for separate complex back face processing steps while achieving the same electrostatic control benefits
3Ease of manufacture
If front face ion implantation is used to create back gates, then manufacturing is simplified, but residual dopants contaminate the superficial semiconductive layer
Solution Approach 1:
The harmful dopant implantation step is completely removed from the process. Instead of implanting dopants from the front face, the method extracts material from the sacrificial layer to create the back gate cavity, then fills it with conductive material. This eliminates residual dopant contamination while maintaining manufacturing simplicity
Solution Approach 2:
The sacrificial layer acts as a temporary, disposable structure that is removed after serving its purpose of defining the back gate cavity. This approach avoids the need for complex dopant management and cleanup procedures, achieving both manufacturing simplicity and device purity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances integration density by confining etching and filling within the trench pattern, enabling dense co-integration of semiconductive devices with back gates without increasing trench width, thus improving the production of back gates under SOI semiconductive devices.
Implementation Method 1
a removal of the sacrificial layer selectively at the semiconductive layer, to the support layer and to the isolation trenches, so as to form a cavity under the semiconductive device
Implementation Method 2
a filling of the cavity with an electrically conductive material, so as to form the back gate under the semiconductive device
Data Source
AI summary
A method is provided for producing a back gate under a semiconductive device surrounded by isolation trenches. The method includes a partial etching of the isolation trenches forming an opening to the sacrificial layer, a selective removal of the sacrificial layer forming a cavity under the device, and a filling of the cavity with a conductive material so as to form the back gate. Advantageously, the formation of the isolation trenches comprises a formation of a sacrificial coating layer at the flanks of the trenches, in contact with the sacrificial layer, before filling with an isolating material, and the partial etching of the trenches comprises a removal of this sacrificial coating layer selectively at the isolating material.


