Backside Epitaxial Contact for SOI Wafer Stress Reduction
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Solution Overview
Problem
Existing methods for forming electrical contacts to the semiconductor bulk handle wafer in silicon on insulator (SOI) substrates face challenges such as the need for thick resist or hard masks, surface flatness control, contamination avoidance, thermal budget limitations, and complex deep etch aspect ratios, which complicate the process and introduce stress.
Innovation Solution
A process involving the formation of an opening through the semiconductor film and insulating layer to expose the bulk handle wafer, followed by epitaxial growth to fill the opening and create a thick semiconductor film, with trench isolation to define an electrical contact, using a high-temperature epitaxial process and potentially multiple epitaxial growth steps to manage insulating layer thickness and minimize stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deep etch is used to form electrical contact through thick semiconductor film and insulating layer, then electrical contact is achieved, but process complexity and stress increase due to thick resist/hard mask requirements and complex aspect ratios
Solution Approach 1:
Instead of etching from the front surface through the thick semiconductor film and insulating layer, the patent inverts the approach by forming the opening from the back surface of the insulating layer. This reversal simplifies the etch depth and eliminates the need for thick resist or hard masks, directly resolving the technical contradiction between achieving reliable electrical contact and reducing process complexity
Solution Approach 2:
The patent performs preliminary actions by first forming the opening through the insulating layer from the back surface before depositing the conductive material. This preliminary opening formation simplifies subsequent steps and avoids the complexity of forming deep trenches through thick films, thereby reducing overall process complexity while ensuring reliable electrical contact
2Reliability
If deep etch is used to form electrical contact, then contact is made to bulk handle wafer, but surface flatness control becomes difficult
Solution Approach 1:
By inverting the etch direction to start from the back surface of the insulating layer rather than the front surface of the thick semiconductor film, the patent avoids disrupting the flatness of the front surface. This inversion allows electrical contact formation without compromising surface flatness control, resolving the contradiction between achieving contact and maintaining precision
3Reliability
If deep etch with barrier liner and metal fill is used, then electrical contact is formed, but contamination risk increases
Solution Approach 1:
The patent extracts or removes the insulating layer material to form the opening, eliminating the need for barrier liners that would otherwise be required to prevent metal contamination of the semiconductor film. By taking out the insulating layer rather than etching through the semiconductor film, the design inherently prevents contamination while forming the electrical contact
Solution Approach 2:
The patent uses the removed insulating layer material as an intermediary that fills the opening, creating a natural barrier that prevents metal fill contamination of the semiconductor structures. This intermediary approach eliminates the need for separate barrier liner layers while maintaining contamination protection
4Length of moving object
If thick resist or hard mask is used for deep etch, then etch depth is sufficient, but thermal budget limitations are imposed
Solution Approach 1:
By inverting the etch direction to form the opening from the back surface of the insulating layer, the patent reduces the required etch depth significantly. This shorter etch depth eliminates the need for thick resist or hard masks, thereby reducing the thermal budget required for mask deposition and removal processes while still achieving the necessary electrical contact
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces stress, avoids contamination, and is compatible with thick silicon films and varying insulating layer thicknesses, resulting in a flatter surface and improved contact quality.
Implementation Method 1
epitaxial growth to fill the opening and create a thick semiconductor film
Data Source
AI summary
A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.