SOI Capacitor Structure Using Trench Isolation for High Density
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Solution Overview
Problem
In advanced semiconductor technologies, there is a need for capacitor structures that offer high capacitance with minimal area consumption, particularly at technology nodes smaller than 100 nm, such as 22 nm, where existing solutions struggle to balance capacitance and area efficiency effectively.
Innovation Solution
A method of forming a capacitor structure using a semiconductor-on-insulator (SOI) substrate with shallow trench isolation (STI) and a metal-insulator-metal (MIM) configuration, where trenches are etched into the substrate to expose semiconductor material for insulating and electrode material deposition, enhancing capacitance through increased insulating material area without significant area expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional planar capacitor structures are used, then the device area is small, but the capacitance is insufficient
Solution Approach 1:
The patent transitions from a planar two-dimensional capacitor structure to a three-dimensional structure by forming vertical trenches in the semiconductor substrate. The capacitor structure extends in the vertical dimension with multiple layers including conductive electrodes and insulating materials stacked above each other, thereby increasing capacitance without proportionally increasing the planar footprint.
Solution Approach 2:
The patent implements a nested structure where conductive electrodes and insulating materials are arranged in alternating layers within the trench. Each layer is nested within the trench structure, with the bottom electrode at the trench bottom, followed by insulating material, then top electrode, creating a compact nested configuration that maximizes capacitance density.
2Quantity of substance
If the insulating material layer thickness is increased to improve capacitance, then the capacitance increases, but the device height increases
Solution Approach 1:
The patent segments the capacitor structure into multiple thin alternating layers of conductive material and insulating material within the trench. Instead of using a single thick insulating layer, the structure divides the insulating material into multiple thinner segments separated by conductive electrodes, increasing the effective capacitance area while controlling the overall height through the trench depth.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a capacitor structure with higher capacitance at lower area consumption, leveraging the corrugated configuration to increase the insulating material area, thereby improving performance in compact semiconductor designs.
Implementation Method 1
forming a layer of insulating material over the first active region, the layer of insulating material covering the exposed semiconductor substrate material
Data Source
AI summary
The present disclosure provides a method of forming a capacitor structure and a capacitor structure. A semiconductor-on-insulator substrate is provided comprising a semiconductor layer, a buried insulating material layer and a semiconductor substrate material. A shallow trench isolation structure defining a first active region on the SOI substrate is formed, the first active region having a plurality of trenches formed therein. Within each trench, the semiconductor substrate material is exposed on inner sidewalls and a bottom face. A layer of insulating material covering the exposed semiconductor substrate material is formed, and an electrode material is deposited on the layer of insulating material in the first active region.