High-Voltage SOI IC Using Cascode Impedance Dividers

The patent divides the high-voltage circuit into multiple tubs (first tub, second tub, third tub) that are dielectrically isolated from each other using buried oxide layers and dielectric trenches. Each tub can operate at different voltage levels, allowing the overall circuit to handle very high voltages (1000V or higher) while each individual component remains within its maximum operating voltage limits. This segmentation enables the circuit to process voltages beyond what any single component could withstand alone.

The patent introduces dielectric materials (buried oxide layers and dielectric trenches) as intermediaries to electrically isolate different tubs and components. These dielectric structures act as mediators that allow high voltage potentials to exist between different regions without causing breakdown, enabling the circuit to operate at very high voltages while maintaining component safety. The dielectric isolation structures serve as the intermediary that makes high-voltage operation possible without exceeding component limits.

The patent segments the voltage handling function across multiple dielectrically isolated tubs, where each tub processes a portion of the total voltage. This segmentation allows the circuit to achieve high voltage operation through parallel isolation rather than series connection of active components, reducing the stress on individual components and simplifying the overall architecture compared to traditional series connections.

The dielectric isolation structures automatically provide voltage distribution and stress management across the different tubs. Each tub self-manages its voltage level through the dielectric isolation, eliminating the need for complex external voltage division circuits or additional protective components that would be required in a series-connected architecture. The system serves itself by using the inherent properties of the dielectric materials to manage voltage distribution.

The patent combines multiple dielectric isolation techniques (buried oxide layers and dielectric trenches) into a unified isolation system that achieves comprehensive component isolation. By merging these different isolation methods, the patent creates a robust isolation architecture that ensures reliable electrical separation between tubs while utilizing standard semiconductor fabrication processes, thereby balancing reliability improvement with manufacturing feasibility.

The patent utilizes parameter changes in the dielectric materials (such as oxide thickness, dielectric constant, and material composition) to optimize the isolation effectiveness. By carefully controlling these parameters during fabrication, the patent achieves reliable electrical isolation between tubs using well-established semiconductor manufacturing techniques, avoiding the need for complex or non-standard fabrication processes.