SOI Isolation Structure With Uniform Charge Trap Layer

Solution Overview

Problem

Current semiconductor-on-insulator (SOI) devices face challenges with cross-talk degradation due to the formation of a high conducting charge layer at the insulating and substrate interface, which limits robust isolation to specific areas and increases costs through deep trench implantation.

Innovation Solution

A charge trap layer is formed uniformly across the insulating/substrate interface, eliminating the need for deep trench implantation and providing robust isolation across the entire SOI structure by extending throughout the insulating layer, thereby reducing cross-talk between devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If deep trench implantation is used to form charge trap layer, then robust isolation is achieved in specific areas, but manufacturing cost increases and process complexity increases

Engineering Contradiction:

Improveisolation performanceVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by forming charge trap layers only in specific regions where isolation is needed, rather than uniformly across the entire substrate. This allows robust isolation performance in critical areas while avoiding unnecessary processing elsewhere, thereby reducing manufacturing costs and process complexity

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent segments the charge trap layer formation into discrete deep trench implantation zones rather than applying it across the whole substrate. This segmentation enables targeted isolation where required, reducing overall manufacturing cost and complexity while maintaining reliability in critical regions

Inventive Principle:

Principle #1Segmentation

2Reliability

If deep trench implantation is used to form charge trap layer, then robust isolation is achieved in specific areas, but device complexity increases

Engineering Contradiction:

Improveisolation performanceVSAvoidprocess complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by forming charge trap layers only in specific regions where isolation is needed, rather than uniformly across the entire substrate. This allows robust isolation performance in critical areas while avoiding unnecessary processing elsewhere, thereby reducing manufacturing costs and process complexity

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent inverts the conventional approach by using selective area implantation rather than full-substrate processing. This reversal simplifies the overall process by eliminating the need for extensive trench formation and processing across the entire device area, reducing device complexity while maintaining isolation effectiveness

Inventive Principle:

Principle #13The other way round (Inversion)

3Ease of manufacture

If charge trap layer is formed only in specific areas, then manufacturing cost is reduced, but cross-talk between devices increases

Engineering Contradiction:

Improvemanufacturing costVSAvoidcross-talk

Core Design Contradiction:

Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by forming charge trap layers only in specific regions where isolation is needed, rather than uniformly across the entire substrate. This allows robust isolation performance in critical areas while avoiding unnecessary processing elsewhere, thereby reducing manufacturing costs and process complexity

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent uses charge trap layers as intermediary structures formed in strategic locations to block harmful charge carrier migration between devices. These intermediary charge trap regions effectively reduce cross-talk without requiring comprehensive processing across the entire substrate, balancing cost reduction with cross-talk mitigation

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures robust isolation across the SOI structure, reducing cross-talk and manufacturing costs by eliminating the requirement for deep trench etching, resulting in improved performance and cost-effectiveness.

Implementation Method 1

a charge trap layer may be built across the insulating/substrate interface

Methodology Applied

Scientific EffectCharge trapping:

Data Source

PatentUS11855137B2SOI device structure for robust isolation

Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

This disclosure provides for robust isolation across the SOI structure. In contrast to forming a charge trap layer in specific areas on the structure, a charge trap layer may be built across the insulating/substrate interface. The charge trap layer may be an implantation layer formed throughout and below the insulation layer. Devices built on this SOI structure have reduced cross-talk between the devices. Due to the uniform structure, isolation is robust across the structure and not confined to certain areas. Additionally, deep trench implantation is not required to form the structure, eliminating cost. The semiconductor-on-insulator substrate may include an active silicon layer over an oxide layer. The oxide layer may be over a charge trap layer. The charge trap layer may be over a silicon substrate.