SOI Semiconductor Chip Insulating Region Heavy Metal Diffusion
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Solution Overview
Problem
Conventional semiconductor chips face reliability issues due to the diffusion of heavy metals into the circuit forming region during the dicing process, which can lead to performance degradation, especially in DRAMs.
Innovation Solution
A semiconductor chip with an insulating region surrounding the entire side face of the circuit forming region, comprising multiple layers of insulating films such as SiO2, SiN, and SiON, which acts as a metal diffusion barrier, preventing heavy metals from entering the circuit area and enhancing mechanical strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the semiconductor substrate is diced to form individual chips, then the semiconductor chip can be obtained for use, but heavy metals may be attached to the side face and diffuse into the circuit forming region, deteriorating reliability
Solution Approach 1:
An insulating film is introduced as an intermediary barrier between the external environment (where heavy metals may be present) and the circuit forming region. This insulating film, positioned at the side face of the semiconductor substrate, prevents direct contact and diffusion pathways for heavy metals into the sensitive circuit areas, thereby maintaining reliability while allowing the dicing process to proceed.
Solution Approach 2:
The insulating film is formed in advance on the side face of the semiconductor substrate before the dicing process. This preliminary protective layer counteracts the potential harmful effect of heavy metal attachment and diffusion that would otherwise occur during subsequent handling and mounting operations, preventing reliability deterioration before it can happen.
2Reliability
If an insulating film is added to surround the side face of the circuit forming region, then heavy metal diffusion is prevented, but the device structure becomes more complex
Solution Approach 1:
The insulating film is applied selectively only to the side face region of the semiconductor substrate that corresponds to the circuit forming region, rather than coating the entire substrate. This localized application provides the necessary protection against heavy metal diffusion while minimizing the addition of structural complexity and material usage.
Solution Approach 2:
The protective insulating structure is segmented to cover only the specific side face areas that require protection, rather than creating a continuous comprehensive coating. This segmentation approach provides targeted protection where heavy metal diffusion is a risk while avoiding unnecessary structural complexity in regions where protection is not needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents heavy metal diffusion into the circuit forming region, thereby improving the reliability and mechanical strength of the semiconductor chip, while also simplifying the manufacturing process by integrating the formation of the insulating region and through electrode in a single step.
Implementation Method 1
the insulating region is constituted by comprising the insulating film formed into multilayered structure, therefore it is possible to more certainly prevent the heavy metals or the like from being diffused into the circuit forming region
Data Source
AI summary
The semiconductor chip 1 has a semiconductor substrate 10. In the present embodiment, the semiconductor substrate 10, which is an SOI substrate, is constituted by comprising a support substrate 12, an insulating layer 14 formed on the support substrate 12 with a layered structure, and a silicon layer 16 formed on the insulating layer 14 with the layered structure. The semiconductor substrate 10 has a circuit forming region A1 provided in the silicon layer 16. An insulating region 18 is provided on the semiconductor substrate 10. The insulating region 18 is provided so as to surround the entire side face of the circuit forming region A1.