SOI Chip Penetrating Electrode EMI Shielding

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Solution Overview

Problem

The increasing frame rate and resolution of display apparatuses lead to increased power consumption and electromagnetic interference (EMI) in integrated circuit chips, which are not effectively addressed by existing technologies.

Innovation Solution

An integrated circuit chip with a semiconductor on insulator (SOI) substrate and a penetrating electrode structure that provides electromagnetic shielding, reducing EMI while minimizing the area required for shielding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional electromagnetic shielding structures are added to reduce EMI, then EMI tolerance is improved, but the chip area increases

Engineering Contradiction:
ImproveEMI toleranceVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the electromagnetic shielding function with existing chip structures by forming conductive ion implantation regions within the bulk substrate and using penetrating electrode portions that integrate through multiple layers. This consolidation eliminates the need for separate shielding structures, achieving EMI protection without increasing chip area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from planar shielding approaches to three-dimensional shielding by forming conductive regions that extend vertically through the bulk substrate and using penetrating electrodes that pass through multiple horizontal layers. This vertical integration provides comprehensive EMI shielding while maintaining a compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the frame rate and resolution of display apparatus are increased, then display performance is improved, but electromagnetic interference increases

Engineering Contradiction:
Improveframe rateVSAvoidelectromagnetic interference
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent implements preliminary electromagnetic shielding by forming conductive ion implantation regions and penetrating electrode structures during the chip fabrication process, before the chip is operational. This pre-established shielding network proactively counteracts EMI generated by high-speed display operations, allowing increased frame rates and resolutions without compromising signal integrity.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces EMI in integrated circuit chips, allowing for increased frame rates and resolutions without the need for additional shielding structures, thus enhancing the performance and usability of display apparatuses.

Implementation Method 1

a conductive ion implantation region formed at a position adjacent to the buried insulating film in the bulk substrate... the penetrating electrode portion connected to the conductive ion implantation region

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Implementation Method 2

the penetrating electrode portion penetrating the semiconductor body layer and the buried insulating layer in a vertical direction, and the penetrating electrode portion connected to the conductive ion implantation region

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS11721640B2Integrated circuit chip, integrated circuit package and display apparatus including the integrated circuit chip
Publication Date: 2023.08.08 SAMSUNG ELECTRONICS CO LTD
  • US11721640B2 patent drawing
  • US11721640B2 patent drawing
  • US11721640B2 patent drawing

AI summary

An integrated circuit chip includes an SOI substrate having a structure in which a bulk substrate, a buried insulating film, and a semiconductor body layer are sequentially stacked, a conductive ion implantation region formed at a position adjacent to the buried insulating film in the bulk substrate, an integrated circuit portion formed on an active surface of the semiconductor body layer, and a penetrating electrode portion arranged at a position spaced apart from the integrated circuit portion in a horizontal direction, the penetrating electrode portion penetrating the semiconductor body layer and the buried insulating layer in a vertical direction, and the penetrating electrode portion connected to the conductive ion implantation region. An integrated circuit package and a display device include the integrated circuit chip.