SOI CMOS High-Voltage Switch With Modulated Resistance Control
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Solution Overview
Problem
Conventional high-voltage switching devices require specialized processing or exotic materials, leading to increased cost, size, and complexity, and existing solutions do not effectively meet modern size, efficiency, and cost requirements for standard MOSFET processing.
Innovation Solution
The development of high-voltage switching devices that integrate a FET structure with a modulated resistance region controlled by Voltage-Drop Modulation Gates (VDMGs), allowing for independent biasing to protect against excessive voltages and enhance voltage handling capabilities without requiring exotic materials or complex processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If specialized processing or exotic materials are used to create high-voltage switching devices, then voltage handling capability is improved, but cost, size, and complexity increase
Solution Approach 1:
The patent modifies the electrical parameters of a standard MOSFET by introducing a modulated resistance region that can dynamically adjust its resistance based on applied bias voltages. This allows the device to withstand high voltages (e.g., 100V) without requiring specialized high-voltage processing or exotic materials, thereby improving voltage handling capability while maintaining standard manufacturing processes
Solution Approach 2:
The patent introduces a modulated resistance region as an intermediary element between the drain and the FET channel. This intermediate region, controlled by voltage-drop modulation gates, acts as a buffer that protects the FET from excessive voltages by adjusting its resistance state, enabling high-voltage operation without directly exposing the FET to high stress conditions
2Reliability
If specialized processing or exotic materials are used to create high-voltage switching devices, then voltage handling capability is improved, but device size increases
Solution Approach 1:
The patent merges the voltage modulation function directly into the FET structure by integrating voltage-drop modulation gates and a modulated resistance region within the same device footprint. This consolidation allows the device to achieve high-voltage handling capability without requiring additional external components or increasing overall device size
3Ease of manufacture
If conventional MOSFET processing is used, then manufacturing cost is reduced, but voltage handling capability is insufficient
Solution Approach 1:
The patent achieves high-voltage capability through parameter changes in the resistance region rather than through changes in manufacturing process complexity or materials. By controlling the resistance state through bias voltages applied to modulation gates, the device can dynamically adapt to high-voltage conditions using standard MOSFET processing techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of compact, efficient, and cost-effective high-voltage switching devices that can withstand higher voltages than conventional designs, with improved breakdown voltage and reduced size and cost, while being fabricated using standard low-voltage processes.
Implementation Method 1
The at least one VDMG controls the resistance of the modulated resistance region by at least partially depleting the modulated resistance region upon application of a bias voltage
Data Source
AI summary
A high-voltage switching device that can be fabricated in a standard low-voltage process, such as CMOS, and more specifically SOI CMOS. Embodiments include integrated circuits that combine, in a unitary structure, a FET device and an integrated, co-fabricated modulated resistance region (MRR) controlled by one or more Voltage-Drop Modulation Gates (VDMGs). The VDMGs are generally biased independently of the gate of the FET device, and in such a way as to protect each VDMG from excessive and potentially destructive voltages. In a first embodiment, an integrated circuit high voltage switching device includes a transistor structure including a source, a gate, and an internal drain; an MRR connected to the internal drain of the transistor structure; at least one VDMG that controls the resistance of the MRR; and a drain electrically connected to the MRR. Each VDMG at least partially depletes the MRR upon application of a bias voltage.


