SOI Device Common Implantation Mask for Decoupled Well Doping
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Solution Overview
Problem
In the fabrication of SOI semiconductor devices, the conventional process strategies for forming substrate and film diodes require a compromise in performance due to the need for shared lithography steps, leading to suboptimal well dopant concentration profiles that affect both transistor and diode characteristics, and the thermal sensing capabilities are hindered by the buried insulating layer's low thermal conductivity, causing temperature gradients and accuracy issues.
Innovation Solution
The technique involves using a common implantation mask to define the shape and position of well regions in both the substrate and active semiconductor layers, allowing for decoupled dopant concentration profiles and independent adjustment of well dopant concentrations for substrate and film diodes, eliminating the need for additional lithography steps and enhancing performance without compromising throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a common lithography mask is used for forming both substrate and film diodes, then the number of lithography steps is reduced and manufacturing complexity is lowered, but the well dopant concentration profiles become coupled and cannot be independently optimized for each diode type
Solution Approach 1:
The patent segments the dopant introduction process into two independent ion implantation steps: a first ion implantation process that forms well regions in the substrate, and a second ion implantation process that forms well regions in the active semiconductor layer. This segmentation allows independent optimization of dopant concentration profiles for substrate diodes and film diodes, resolving the contradiction between process simplicity and doping precision.
2Manufacturing precision
If separate lithography steps are used for substrate and film diodes, then well dopant concentration profiles can be independently optimized, but the number of lithography steps increases and manufacturing complexity rises
Solution Approach 1:
The patent merges the lithography steps into a single common lithography process that defines the patterns for both substrate diodes and film diodes simultaneously. This combining of lithography operations reduces the number of lithography steps and simplifies the overall process flow, while the subsequent separate ion implantation steps maintain the ability to independently control dopant concentrations.
3Reliability
If the buried insulating layer is present for thermal isolation, then device electrical isolation is improved, but thermal sensing accuracy deteriorates due to temperature gradients caused by low thermal conductivity
Solution Approach 1:
The patent introduces a thermal conduction path that acts as an intermediary between the active semiconductor layer and the substrate. This thermal conduction path, formed by the well regions extending through the buried insulating layer, facilitates heat transfer and reduces temperature gradients, thereby improving thermal sensing accuracy while maintaining the electrical isolation function of the buried insulating layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for superior flexibility in adjusting diode and transistor characteristics independently, improving the overall performance of SOI devices by decoupling well dopant concentrations and reducing the complexity of the process flow, thereby enhancing thermal sensing accuracy and device performance.
Implementation Method 1
performing a first implantation process by using the implantation mask so as to introduce a first well dopant species into a substrate that is formed below the semiconductor layer; performing a second implantation process by using the implantation mask so as to introduce a second well dopant species into the semiconductor layer
Data Source
AI summary
When forming sophisticated SOI devices, a substrate diode and a film diode are formed by using one and the same implantation mask for determining the well dopant concentration in the corresponding well regions. Consequently, during the further processing, the well dopant concentration of any transistor elements may be achieved independently from the well regions of the diode in the semiconductor layer.