SOI Substrate Contact Isolation Using Dielectric Layers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In advanced integrated circuit manufacturing, particularly in sub-22 nm technologies, forming contacts to source/drain regions of transistors on silicon-on-insulator (SOI) substrates without creating electrical shorts to the semiconductor bulk substrate is challenging due to scaling and patterning limitations, especially when shallow trench isolations (STIs) are involved.
Innovation Solution
The method involves forming shallow trench isolations (STIs) with specific dielectric layers, including a flowable oxide material and nitride spacer layers, to protect the semiconductor bulk substrate during contact formation, ensuring that contacts can be made adjacent to STI regions without overlapping and causing shorts, by using a sequence of dielectric layer formations and etching processes that prevent over-etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If contacts are formed adjacent to STI regions in sub-22 nm technologies, then manufacturing precision is improved, but electrical shorts to the bulk substrate occur
Solution Approach 1:
The patent applies preliminary action by forming a protective dielectric layer (such as nitride or oxide) over the bulk substrate before forming the contact holes. This protective layer is deposited in advance to prevent potential shorts during subsequent contact formation processes, allowing contacts to be formed adjacent to STI regions without risking electrical shorts to the bulk substrate.
Solution Approach 2:
The patent uses a dielectric protective layer as an intermediary between the contact structure and the bulk substrate. This intermediate layer acts as a barrier that prevents direct electrical contact between the conductive contact material and the bulk substrate, thereby eliminating the short circuit issue while allowing the contact to be positioned adjacent to STI regions.
2Device complexity
If CA contacts overlap STI regions in sub-22 nm technologies, then device complexity is reduced, but electrical shorts to the bulk substrate occur
Solution Approach 1:
The protective dielectric layer is formed over the bulk substrate before the contact holes are etched, preventing shorts even when contacts overlap STI regions. This preliminary protective measure allows the simplified contact layout to be used without risking electrical shorts.
Solution Approach 2:
The dielectric protective layer serves as an intermediary barrier between the contact material and the bulk substrate. Even when contacts overlap STI regions, this intermediate layer prevents direct electrical contact with the bulk substrate, maintaining reliability while allowing simpler contact structures.
3Manufacturing precision
If contact holes are etched through the buried insulation layer adjacent to STIs, then manufacturing precision is improved, but harmful factors increase due to potential shorts
Solution Approach 1:
The patent applies preliminary anti-action by forming a protective dielectric layer over the bulk substrate before etching the contact holes. This protective layer counteracts the potential harmful effect of shorts by providing a barrier that prevents electrical contact between the contact material and the bulk substrate, even when contact holes are precisely etched adjacent to STI regions.
Solution Approach 2:
The dielectric protective layer acts as an intermediary barrier that eliminates the harmful short circuit effect. It allows the precise contact hole etching to proceed adjacent to STI regions without the risk of electrical shorts, as the protective layer blocks any potential conductive path to the bulk substrate.
Data Source
AI summary
A device including an SOI substrate and an isolation structure positioned at least partially in a trench that extends through a buried insulation layer and into a semiconductor bulk substrate of the SOI substrate is disclosed. The isolation structure includes a first dielectric layer positioned in a lower portion of the trench, a first material layer positioned above the first dielectric layer, the first material layer having a material different from a material of the first dielectric layer, and a second dielectric layer positioned above the first material layer, the second dielectric layer having a material different from the material of the first material layer.