SOI Contact Plug Structure for Reliable VC Inspection

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Solution Overview

Problem

The existing methods for manufacturing semiconductor devices face challenges in ensuring high reliability due to formation failures in contact plugs, particularly high resistance issues caused by defective filling or transformation at the bottom of the contact plug, which affect the continuity between the contact plug and the semiconductor substrate.

Innovation Solution

A method involving the use of a Silicon On Insulator (SOI) substrate with a stacked structure, including a semiconductor substrate, an insulating layer, and a semiconductor layer, where a first MISFET is formed for a circuit and a second MISFET is formed for Voltage Contrast (VC) inspection. This method includes forming contact holes and contact plugs, with a specific third contact plug electrically connected to both the semiconductor layer and the substrate, enhancing the electrical connection and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional contact plug formation is used, then manufacturing process is simple, but reliability is poor due to formation failures and high resistance

Engineering Contradiction:
Improvecontact plug reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the contact plug formation process into multiple stages: forming a first contact hole through the insulating layer, filling it with a first conductive material, then forming a second contact hole through the first conductive material to reach the semiconductor substrate, and filling it with a second conductive material. This segmentation allows each stage to be optimized independently, improving overall reliability while managing complexity through systematic process breakdown.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by forming the first contact hole and filling it with the first conductive material before forming the second contact hole. This preliminary structure serves as a foundation and intermediate connection layer, ensuring proper electrical connection and reducing the risk of formation failures in the final contact plug structure.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If contact plug inspection is performed, then formation failures can be detected, but productivity decreases due to additional inspection time

Engineering Contradiction:
Improvecontact plug inspection accuracyVSAvoidmanufacturing throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent incorporates a test element group (TEG) with a contact plug structure during the manufacturing process, allowing inspection to be performed on a sample basis rather than requiring inspection of every contact plug. This preliminary inspection structure enables detection of formation failures with high accuracy while maintaining productivity by inspecting representative samples rather than the entire production batch.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If continuous contact plug structure is used, then electrical connection is good, but susceptibility to transformation defects increases

Engineering Contradiction:
Improveelectrical connection continuityVSAvoidtransformation defect susceptibility
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the continuous contact plug into two distinct parts: a first contact plug formed with a first conductive material, and a second contact plug formed with a second conductive material. This segmentation reduces susceptibility to transformation defects by limiting the extent of any single material structure, while maintaining good electrical connection through the intermediate first contact plug that bridges the insulating layer and the second contact plug reaching the semiconductor substrate.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11915975B2Method of manufacturing semiconductor device
Publication Date: 2024.02.27 RENESAS ELECTRONICS CORP
  • US11915975B2 patent drawing
  • US11915975B2 patent drawing
  • US11915975B2 patent drawing

AI summary

A first MISFET is formed on a semiconductor layer of an SOI substrate in a circuit region and a second MISFET composing a TEG for VC inspection is formed on the semiconductor layer of the SOI substrate in a TEG region. An interlayer insulating film is formed, contact holes are formed in the interlayer insulating film, and plugs are formed in the contact holes, respectively. In the TEG region, the plugs include a plug electrically connected to both the semiconductor substrate composing the SOI substrate and the semiconductor layer composing the SOI substrate.