SOI Semiconductor Device with Alternating Charge Collection Regions
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Solution Overview
Problem
Semiconductor-on-insulator (SOI) field-effect transistors face challenges in achieving both high drain-source breakdown voltage and current driving capability, as increasing one parameter often compromises the other, particularly due to the floating body effect and the trade-off between source-drain breakdown voltage and current driving capability.
Innovation Solution
The design incorporates a silicon-on-insulator substrate with source diffusion regions and charge collection regions alternately disposed in the gate width direction, with specific width and length conditions (Weff/2≦Lg+Ldrift/2) to enhance current driving capability while maintaining adequate breakdown voltage, and an optimized drift region to control electric field distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If charge collection regions are increased in width to suppress floating body effects and increase drain-source breakdown voltage, then breakdown voltage is improved, but source region width decreases and current driving capability deteriorates
Solution Approach 1:
The patent introduces a new spatial dimension by extending charge collection regions in the gate length direction (vertical dimension in cross-section) rather than only in the gate width direction (horizontal dimension). This creates a three-dimensional charge collection structure that collects carriers from both lateral and vertical directions, effectively suppressing floating body effects without encroaching on source region width in the gate width direction, thus maintaining current driving capability while improving breakdown voltage
Solution Approach 2:
The charge collection structure is segmented into multiple components: charge collection regions extending laterally from source regions, and additional charge collection regions extending vertically from the semiconductor layer beneath the gate electrode. This segmentation allows different portions of the charge collection structure to serve different functions - lateral regions collect carriers near the source while vertical regions collect carriers generated deeper in the drift region, achieving comprehensive floating body effect suppression without compromising source region dimensions
2Productivity
If source regions are widened to increase current driving capability, then current driving capability is improved, but device width increases and size increases
Solution Approach 1:
The patent utilizes the vertical dimension (gate length direction) to enhance charge collection capability through extended charge collection regions that protrude downward from the semiconductor layer beneath the gate electrode. This vertical extension provides additional charge collection volume without increasing the horizontal footprint of the device, allowing adequate breakdown voltage to be achieved in a compact device layout, thereby enabling source regions to be optimized for current driving capability without excessive device width increase
3Productivity
If the ratio of gate width to gate length (W/L) is increased to improve current driving capability, then current driving capability is improved, but the area occupied by charge collection regions decreases and breakdown voltage decreases
Solution Approach 1:
The patent compensates for the reduced horizontal space available for charge collection regions (resulting from high W/L ratio) by extending charge collection regions vertically in the gate length direction. This vertical extension creates additional charge collection volume that does not consume gate width, allowing the device to maintain high W/L ratio for current driving capability while still achieving adequate breakdown voltage through the vertically extended charge collection structure
Solution Approach 2:
The patent applies different structural characteristics to different regions: the gate width direction is optimized for current driving capability with adequate source region width, while the gate length direction is optimized for breakdown voltage with extended vertical charge collection regions. This local optimization allows each dimension to serve its primary function without compromising the other, enabling high W/L ratio devices to achieve both current driving capability and breakdown voltage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for increased current driving capability with only a limited reduction in source-drain breakdown voltage, enabling a smaller device size with improved voltage withstanding performance.
Implementation Method 1
an optimized drift region to control electric field distribution
Implementation Method 2
impact ionization occurs around the edge of the body region next to the drain diffusion region, electron-hole pairs are generated
Implementation Method 3
a buried insulating layer interposed between the semiconductor layer and the base layer for electrical isolation
Data Source
AI summary
A semiconductor device formed on a silicon-on-insulator substrate includes a gate electrode, a gate insulation film, a drain diffusion region, a drift region, a body region, a plurality of source diffusion regions, and a plurality of charge collection diffusion regions. The source diffusion regions and charge collection diffusion regions are of mutually opposite conductivity types, and alternate with one another in the direction paralleling the width of the gate electrode. The half-width of each source diffusion region is equal to or less than the length of the gate electrode plus the half-length of the drift region.