SOI DoP Pixel Sensor Layout for Isolation and Full Well Capacity
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Solution Overview
Problem
Bulk-silicon device-over-photodetector (DoP) image sensors face limitations such as limited silicon surface area for transfer and readout transistors, high noise, high parasitic capacitance, low optical and electrical isolation, and low full well capacity due to full-depth frontside deep trench isolation (FDTI) and partial-depth backside deep trench isolation (BDTI) structures.
Innovation Solution
A semiconductor-on-insulator (SOI) DoP image sensor with a full-depth backside deep trench isolation (BDTI) structure that provides high optical and electrical isolation between photodetectors, low cross-talk, and high full well capacity, utilizing a source-follower transistor with a gate electrode selectively coupled to photodetectors and a readout transistor on a semiconductor mesa independent of the substrate, enhancing design flexibility and noise reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If full-depth frontside deep trench isolation (FDTI) and partial-depth backside deep trench isolation (BDTI) structures are used, then optical and electrical isolation between photodetectors is improved, but silicon surface area for transfer and readout transistors is limited and parasitic capacitance increases
Solution Approach 1:
The patent moves the readout transistor from the substrate plane to a raised semiconductor mesa structure, utilizing the vertical dimension to create spatial separation. This allows the readout transistor to be positioned above the substrate level, effectively increasing the available silicon surface area while maintaining deep trench isolation between photodetectors.
Solution Approach 2:
The patent segments the device structure into distinct functional regions: photodetectors remain in the substrate, transfer transistors are positioned at photodetector interfaces, and readout transistors are placed on elevated semiconductor mesas. This segmentation allows each component to occupy optimized spatial locations, resolving the conflict between isolation requirements and transistor area availability.
2Reliability
If full-depth frontside deep trench isolation (FDTI) structure is used, then optical isolation is improved, but full well capacity is reduced
Solution Approach 1:
The patent applies different isolation depths to different regions: full-depth FDTI is used where optical isolation is critical between adjacent photodetectors, while partial-depth BDTI is used in regions where full well capacity is prioritized. This localized approach allows optimization of both optical isolation and charge storage capacity in their respective zones.
3Productivity
If transfer transistors are positioned at photodetectors, then charge transfer efficiency is improved, but device complexity and noise increase
Solution Approach 1:
The patent merges the transfer transistor positioning with the deep trench isolation structure, placing transfer transistors at the interfaces where photodetectors meet the isolation trenches. This integration allows efficient charge transfer while using the isolation structure itself as part of the transistor positioning framework, reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SOI DoP image sensor achieves low noise, high optical isolation, and high full well capacity, enabling improved scaling and NIR sensitivity with reduced parasitic capacitance and leakage, thereby enhancing the performance of image sensors.
Implementation Method 1
full-depth backside deep trench isolation (BDTI) structure that provides high optical and electrical isolation between photodetectors
Implementation Method 2
full-depth backside deep trench isolation (BDTI) structure that provides high optical and electrical isolation between photodetectors
Implementation Method 3
a plurality of photodetectors in the semiconductor substrate
Data Source
AI summary
Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) DoP image sensor and a method for forming the SOI DoP image sensor. In some embodiments, a semiconductor substrate comprises a floating node and a collector region. A photodetector is in the semiconductor substrate and is defined in part by a collector region. A transfer transistor is over the semiconductor substrate. The collector region and the floating node respectively define source/drain regions of the transfer transistor. A semiconductor mesa is over and spaced from the semiconductor substrate. A readout transistor is on and partially defined by the semiconductor mesa. The semiconductor mesa is between the readout transistor and the semiconductor substrate. A via extends from the floating node to a gate electrode of the readout transistor.