Semiconductor On Insulator Fabrication Preventing Dopant Contamination

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Solution Overview

Problem

The existing methods for fabricating semiconductor on insulator (SOI) substrates, particularly for opto-electronic applications, face contamination issues due to cross-contamination of dopants and higher defect densities when using n-type substrates, which affect the quality of both n-SOI and p-SOI wafers, and the Smart Cutâ„¢ process exacerbates these problems.

Innovation Solution

A method involving a first semiconductor substrate with a specific impurity type undergoes thermal treatment to reduce impurity density, followed by transferring this modified layer onto a second substrate, where an epitaxial layer with a different impurity type is grown, allowing for the same fabrication line to produce substrates with varying impurity types without contamination, and optimizing substrate quality by reusing materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If n-type donor substrate is used to form n-type SOI layer for optoelectronic applications, then the substrate can be used for image sensors, but cross-contamination from different dopant types occurs leading to unsatisfying dopant profiles

Engineering Contradiction:
Improvesubstrate suitability for optoelectronic applicationsVSAvoiddopant profile quality
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The substrate processing is segmented into separate thermal treatment zones and timing sequences. n-type substrates receive thermal treatment at temperatures and durations optimized for phosphorous dopant activation, while p-type substrates receive treatment optimized for boron dopant activation. This segmentation prevents cross-contamination of thermal profiles and ensures each dopant type receives appropriate processing conditions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The thermal treatment parameters (temperature, duration, atmosphere) are changed based on the dopant type. n-type substrates undergo thermal treatment at specific parameters to activate phosphorous, while p-type substrates undergo thermal treatment at different parameters for boron activation. This parameter adaptation ensures optimal dopant profiles for each substrate type without interference from the other.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If n-type substrates are used for optoelectronic applications, then the substrates can be fabricated, but higher defect densities occur compared to p-type substrates

Engineering Contradiction:
Improvesubstrate functionality for optoelectronic devicesVSAvoidsubstrate defect density
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

n-type substrates undergo preliminary thermal treatment before Smart Cut processing to activate phosphorous dopants and reduce defect density. This preliminary action prepares the substrate in advance, ensuring lower defect density before the critical transfer process, thereby improving reliability while maintaining optoelectronic functionality.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The inherent lower quality of n-type starting substrates is converted into a benefit through targeted thermal treatment. By applying specific thermal processing to activate phosphorous dopants and reduce defects, the initially lower-quality n-type substrates are transformed into high-quality substrates suitable for optoelectronic applications, turning the initial disadvantage into an advantage.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Manufacturing precision

If thermal treatment is applied to reduce impurity density in the modified layer, then contamination is reduced, but additional process steps are required

Engineering Contradiction:
Improveimpurity density reductionVSAvoidnumber of process steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The thermal treatment step for impurity reduction is merged with the Smart Cut processing sequence. The same thermal treatment furnace and processing cycle used for the Smart Cut are also used to reduce impurity density in the modified layer. This merging eliminates the need for separate dedicated thermal treatment equipment and process steps, reducing overall device complexity while maintaining impurity reduction effectiveness.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method prevents contamination and improves substrate quality by allowing the use of higher-quality p-type substrates for n-type SOI production, reducing defect densities and enabling tailored dopant profiles for opto-electronic applications.

Implementation Method 1

subjecting the first semiconductor substrate to a first thermal treatment to thereby reduce the first impurity density in a modified layer adjacent one main surface of the first semiconductor substrate

Methodology Applied
Scientific EffectThermal diffusion: Diffusion

Implementation Method 2

providing a layer, in particular by epitaxial growth, with a second impurity density of a second impurity type different to the first impurity type, on a transferred layer of the modified second substrate

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentEP2282332B1Method for fabricating a semiconductor substrate
Publication Date: 2012.06.27 SOITEC SA
  • EP2282332B1 patent drawingFigure 1a~1i
  • EP2282332B1 patent drawingFigure 2a~2b

AI summary

The invention relates to method for fabricating a semiconductor on insulator substrate comprising the steps of: a) providing a first semiconductor substrate with a first impurity density of a first impurity type, b) subjecting the first semiconductor substrate to a first thermal treatment to thereby reduce the first impurity density in a modified layer adjacent one main surface of the first semiconductor substrate, c) transferring at least partially the modified layer with the reduced first impurity density onto a second substrate, to thereby obtain a modified second substrate, and d) providing a layer, in particular par epitaxial growth, with a second impurity density of a second impurity type different to the first impurity type. By doing so, a contamination by dopants of the second impurity type of a fabrication line using semiconductor material with dopants of the first impurity type, can be prevented.