SOI ESD Protection Circuit With Through-Well Vertical Coupling
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Solution Overview
Problem
Existing electronic circuits manufactured using SOI-type structures face challenges in achieving higher performance and compactness, particularly in electrostatic discharge protection, due to limitations in component layout and trigger voltage requirements.
Innovation Solution
The design incorporates a BiMOS-type transistor and a cathode-gate thyristor coupled by a semiconductor well, replacing traditional wire connections to form a compact electrostatic discharge protection circuit with a lower trigger voltage, utilizing a buried oxide layer in an SOI structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional wire connections are used to couple components in SOI structures, then the circuit layout is simple, but the circuit area is large and performance is limited
Solution Approach 1:
The patent merges the coupling function into the semiconductor well structure itself by forming a through-well that directly connects components across the buried oxide layer, eliminating the need for separate wire connections and reducing overall circuit area while improving performance
Solution Approach 2:
The patent transitions from planar coupling to vertical coupling by creating a through-well that penetrates the buried oxide layer in the vertical dimension, allowing direct connection between upper and lower components and significantly reducing the horizontal circuit footprint
2Reliability
If higher trigger voltage is used in ESD protection circuits, then the protection level is higher, but the circuit consumes more power and has worse performance
Solution Approach 1:
The patent modifies the trigger voltage parameter by optimizing the doping concentrations and well dimensions of the through-well structure, achieving a lower trigger voltage that reduces power consumption during normal operation while maintaining adequate protection levels through the optimized ESD response characteristics
Data Source
AI summary
An electronic circuit includes a first electronic component formed above a buried insulating layer of a substrate and a second electronic component formed under the buried insulating layer. The insulating layer is thoroughly crossed by a semiconductor well. The semiconductor well electrically couples a terminal of the first electronic component to a terminal of the second electronic component.