Transient-Stabilized SOI FET Biasing for RF Standby Transitions
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Solution Overview
Problem
Silicon-on-insulator (SOI) substrates with trap rich layers in RF integrated circuits face challenges with accumulated charge, leading to performance issues such as parasitic surface conduction and long settling times during transitions between standby and active modes, which affect the stability and efficiency of RF transceivers.
Innovation Solution
The approach involves configuring field effect transistors (FETs) to maintain node voltages similar to active mode in standby mode, using techniques like fixed VDS or VGS stabilization, and implementing a 'trickle current' state to reduce charge accumulation, along with forming substrate contacts (S-contacts) to create protected areas and improve impedance matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If FETs are turned OFF completely in standby mode to reduce power consumption, then power consumption is reduced, but accumulated charge changes occur leading to long settling times during transitions to active mode
Solution Approach 1:
The patent applies dynamics by transitioning from a static binary state (fully ON or fully OFF) to a dynamic multi-state operation. FETs can now operate in active mode, standby mode with reduced current, or intermediate states. The trickle current mechanism dynamically adjusts the current level during standby to maintain stability while minimizing power consumption, allowing the system to adapt its operational state based on requirements.
Solution Approach 2:
The patent changes the operational parameters of FETs by introducing a trickle current state during standby mode. Instead of completely turning OFF the FET (zero current), a small non-zero current is maintained, which changes the electrical parameters (current, voltage) to prevent charge accumulation while still achieving significant power reduction compared to active mode.
2Use of energy by moving object
If FETs are turned OFF completely in standby mode to reduce power consumption, then power consumption is reduced, but gain stability deteriorates due to changes in operating points
Solution Approach 1:
The patent applies preliminary action by maintaining a trickle current during standby mode before transitioning to active mode. This preliminary current prevents charge accumulation and keeps the FET operating point stable, so when the FET needs to return to active mode, no significant settling time or gain instability occurs. The system prepares the FET in advance for quick activation while still achieving power savings.
3Reliability
If substrate contacts are added to create protected areas and improve impedance matching, then RF performance is improved, but device complexity increases
Solution Approach 1:
The substrate contacts serve multiple functions simultaneously: they create protected areas around sensitive circuits, improve impedance matching for RF signals, provide electrical connection to the substrate, and help manage charge distribution. This multi-functionality reduces the need for separate dedicated structures for each function, thereby limiting the increase in device complexity while achieving multiple performance benefits.
Data Source
AI summary
Integrated circuits (ICs) that avoid or mitigate creation of changes in accumulated charge in a silicon-on-insulator (SOI) substrate, particularly an SOI substrate having a trap rich layer. In one embodiment, a FET is configured such that, in a standby mode, the FET is turned OFF while maintaining essentially the same VDS as during an active mode. In another embodiment, a FET is configured such that, in a standby mode, current flow through the FET is interrupted while maintaining essentially the same VGS as during the active mode. In another embodiment, a FET is configured such that, in a standby mode, the FET is switched into a very low current state (a “trickle current” state) that keeps both VGS and VDS close to their respective active mode operational voltages. Optionally, S-contacts may be formed in an IC substrate to create protected areas that encompass FETs that are sensitive to accumulated charge effects.