SOI lateral homogenization field high voltage power semiconductor device, manufacturing method and application thereof
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power semiconductor devices face challenges in achieving high voltage withstand characteristics and reducing specific on-resistance, particularly due to insufficient depletion effects and snapback phenomena in SOI materials.
Innovation Solution
The introduction of a global MIS depletion mechanism and vertical floating field plates in an SOI lateral homogenization field high voltage power semiconductor device, which includes a buried dielectric layer and polysilicon electrodes, enhances the breakdown voltage and current density by creating a voltage-sustaining layer with equipotential floating trenches and adaptive charges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional power semiconductor device structures are used, then manufacturing simplicity is maintained, but voltage withstanding characteristics are insufficient and specific on-resistance is high
Solution Approach 1:
The device is segmented into multiple functional regions including drift region, well regions, source regions, drain regions, and isolation regions. Vertical floating field plates are introduced to create equipotential floating trenches that segment the electric field distribution, improving voltage withstanding characteristics while maintaining manageable structural complexity through systematic regional division
Solution Approach 2:
The patent transitions from conventional planar field plates to vertical floating field plates extending into the drift region. This dimensional change from surface-level to volumetric field control creates equipotential floating trenches that more effectively sustain high voltages and reduce specific on-resistance by utilizing the third dimension (depth) for field management
2Reliability
If SOI material is used, then leakage current is reduced and radiation resistance is improved, but snapback phenomenon occurs and degrades output characteristics
Solution Approach 1:
The patent applies preliminary anti-action by introducing vertical floating field plates that create equipotential floating trenches before the snapback phenomenon can occur. These structures pre-establish controlled electric field distribution and depletion regions that prevent the conditions necessary for snapback, thereby eliminating this harmful effect while preserving the beneficial low leakage and radiation resistance properties of SOI material
3Productivity
If drift region doping is increased to reduce specific on-resistance, then current density improves, but voltage withstanding capability deteriorates
Solution Approach 1:
The patent applies local quality by creating regions with different doping concentrations and field control characteristics. The vertical floating field plates create localized equipotential floating trenches with specific electric field distributions, allowing high doping in the drift region for low on-resistance while maintaining voltage withstanding capability through localized field control in the floating trench regions
Solution Approach 2:
The patent utilizes parameter changes by varying the doping concentration in the drift region and controlling the electrical potential of the vertical floating field plates. By adjusting these parameters, the device achieves optimal balance between low specific on-resistance (for high current density) and sufficient voltage withstanding capability through controlled electric field distribution in the equipotential floating trenches
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the breakdown voltage and reduces specific on-resistance, stabilizes the device, and eliminates snapback effects, resulting in enhanced performance and mass-producibility of high voltage power semiconductor devices.
Implementation Method 1
the polysilicon electrode 41 is inserted into the buried dielectric layer 34... forming a voltage-sustaining layer with a plurality of equipotential floating trenches
Implementation Method 2
improves a voltage withstanding characteristic of the device by introducing a global MIS depletion mechanism in the off-state of the device
Implementation Method 3
the highly doped drift region can provide more carriers, which reduces the specific on-resistance and increases the saturation current
Data Source
AI summary
An SOI lateral homogenization field high voltage power semiconductor device, and a manufacturing method and application thereof are provided. The device includes a type I conductive semiconductor substrate, a type II conductive drift region, a type I field clamped layer, type I and type II conductive well regions, the first dielectric oxide layer forming a field oxide layer, the second dielectric oxide layer forming a gate oxide layer, a type II conductive buried dielectric layer, a type II conductive source heavily doped region, a type II conductive drain heavily doped region. The first dielectric oxide layer and the floating field plate polysilicon electrodes form a vertical floating field plate distributed throughout the type II conductive drift region to form a vertical floating equipotential field plate array. When the device is in on-state, high doping concentration can be realized by the full-region depletion effect form the vertical field plate arrays.