SOI FinFET Bulk Source Drain Epitaxial Structure
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Solution Overview
Problem
Current finFET technologies face challenges in achieving optimal performance due to limitations in fin height control, source/drain punch-through leakage, and carrier mobility, particularly in scaling down integrated circuits.
Innovation Solution
A semiconductor structure is developed with a bulk semiconductor substrate, an insulator layer, and epitaxial semiconductor regions that traverse and connect directly to the fins, allowing for improved fin height control and carrier mobility by combining the benefits of both bulk and silicon-on-insulator (SOI) finFET structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a bulk structure is used where fins are formed in the bulk semiconductor substrate, then carrier mobility is improved, but fin height control becomes difficult
Solution Approach 1:
The invention divides the semiconductor structure into distinct segments: a bulk substrate region for carrier mobility and a separate thin film region for precise fin height control. The fin structure spans across an insulator layer, with portions in the bulk substrate and portions in a thin epitaxial layer, allowing each region to fulfill its specific function independently.
Solution Approach 2:
The insulator layer acts as an intermediary element between the bulk substrate and the thin epitaxial layer. It enables the fin to transition between these two regions, allowing the fin to benefit from both the bulk substrate's carrier mobility properties and the thin film's precise height control capabilities.
2Manufacturing precision
If a silicon-on-insulator structure is used where fins are formed in a thin semiconductor layer, then fin height control is improved, but source/drain punch-through leakage increases
Solution Approach 1:
The fin structure is segmented to extend through the insulator layer from the thin epitaxial layer into the bulk substrate. This segmentation allows the fin to maintain precise height control in the thin film region while extending into the bulk substrate to prevent source/drain punch-through leakage.
Solution Approach 2:
The invention creates a composite fin structure that combines materials and regions with different properties: the thin epitaxial layer provides precise height control, the insulator layer provides electrical isolation, and the bulk substrate region prevents punch-through leakage. This composite structure leverages the advantages of each material/region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier mobility and reduces leakage currents, providing improved thermal transfer characteristics and performance comparable to both bulk and SOI finFETs, while maintaining good fin height control.
Implementation Method 1
forming an epitaxial semiconductor region on the plurality of fins, wherein the epitaxial semiconductor region is connected to the bulk semiconductor substrate
Data Source
AI summary
Embodiments of the invention provide a semiconductor structure including a finFET having an epitaxial semiconductor region in direct physical contact with a plurality of fins, wherein the epitaxial semiconductor region traverses an insulator layer and is in direct physical contact with the semiconductor substrate. The gate of the finFET is disposed over an insulator layer, such as a buried oxide layer. Methods of forming the semiconductor structure are also included.