SOI Gate Spacer Structure to Suppress Abnormal Epitaxial Growth
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Solution Overview
Problem
In semiconductor devices using SOI substrates, the abnormal growth of epitaxial layers from gate electrodes can lead to fluctuations in MISFET characteristics and potential leakage issues, particularly when plugs are connected to these layers.
Innovation Solution
A manufacturing method involving the formation of a multilayer offset spacer composed of three or more layers, with a silicon nitride film closest to the gate electrode and alternating layers of silicon nitride and silicon oxide, which suppresses abnormal epitaxial growth by ensuring the upper end of the silicon nitride film is higher than the gate electrode surface, preventing epitaxial layer formation on the gate electrode sides.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an epitaxial layer is formed on a silicon layer with a gate electrode, then the semiconductor device can be manufactured, but the epitaxial layer may grow abnormally from the gate electrode causing MISFET characteristic fluctuations or leakage
Solution Approach 1:
An offset spacer comprising a laminated film with three or more layers (including silicon nitride and silicon oxide layers) is formed as an intermediary structure on the side wall of the gate electrode. This offset spacer acts as a physical barrier that prevents the epitaxial layer from growing abnormally on the gate electrode, while allowing the epitaxial layer to form properly on the semiconductor layer. The multi-layer structure provides both protection against abnormal growth and control over the epitaxial growth process.
Solution Approach 2:
The offset spacer is segmented into multiple thin films with different materials (silicon nitride and silicon oxide) arranged in a laminated structure. This segmentation allows each layer to serve specific functions: the silicon nitride layer provides barrier properties to prevent abnormal epitaxial growth, while the silicon oxide layers provide structural support and control the growth interface. The segmented multi-layer structure is more effective than a single-layer spacer in preventing harmful epitaxial growth.
2Ease of manufacture
If a simple offset spacer structure is used, then the manufacturing process is simpler, but it cannot effectively suppress abnormal epitaxial growth from the gate electrode
Solution Approach 1:
The offset spacer is constructed as a composite structure with three or more layers of different materials (silicon nitride and silicon oxide). This composite material approach leverages the complementary properties of each material: silicon nitride provides excellent barrier characteristics against epitaxial growth, while silicon oxide provides good adhesion and structural stability. The composite multi-layer offset spacer achieves superior epitaxial growth suppression compared to simple single-layer spacers, while remaining compatible with standard semiconductor manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor devices by preventing abnormal epitaxial growth and associated leakage or parasitic capacitance issues, thereby stabilizing MISFET characteristics and improving device performance.
Implementation Method 1
forming a third semiconductor layer on the upper surface of the first semiconductor layer, which is exposed from the offset spacer, by epitaxial growth method
Data Source
AI summary
First, an offset spacer including a stacked film of insulating films is formed on the upper surface of the semiconductor layer, the side surface of the gate electrode, and the side surface of the cap film. Next, a part of the insulating films is removed to expose the upper surface of the semiconductor layer. Next, in a state where the side surface of the gate electrode is covered with the insulating films, an epitaxial layer is formed on the exposed upper surface of the semiconductor layer. Here, among the offset spacers, the insulating film which is a silicon nitride film is formed at a position closest to the gate electrode, and the position of the upper end of the insulating film formed on the side surface of the gate electrode is higher than the position of the upper surface of the gate electrode.