SOI Backside Glass Stack for Ion Blocking During Chip Bonding

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Solution Overview

Problem

During semiconductor chip bonding, ions from the polishing solution can penetrate through the fluorosilicate glass on the back surface of the SOI substrate and affect the electrical properties of the transistor, leading to defects and reduced yield.

Innovation Solution

An additional phosphosilicate glass layer is formed between the SOI substrate and the fluorosilicate glass, which effectively captures and blocks ions like potassium from the polishing solution, preventing them from infiltrating into the transistor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Shape

If fluorosilicate glass is formed on the back surface of the SOI substrate, then the surface planarity is improved, but ions from the polishing solution can penetrate into the transistor affecting electrical properties

Engineering Contradiction:
Improvesurface planarityVSAvoidelectrical properties of transistor
Core Design Contradiction:
ShapeVSReliability

Solution Approach 1:

A phosphosilicate glass layer is introduced as an intermediary barrier between the fluorosilicate glass and the transistor. This intermediate layer specifically captures ions (particularly potassium ions) from the polishing solution, preventing them from penetrating into the transistor's doped regions while allowing the fluorosilicate glass to maintain surface planarity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution uses a composite structure combining two different glass materials: fluorosilicate glass for surface planarization and phosphosilicate glass for ion barrier functionality. Each material performs its specialized function, creating a composite protective system that addresses both surface quality and electrical property protection.

Inventive Principle:
Principle #40Composite materials

2Shape

If polishing is performed to planarize the back surface, then the surface flatness is improved, but ions in the polishing solution infiltrate into the transistor

Engineering Contradiction:
Improvesurface flatnessVSAvoidion infiltration
Core Design Contradiction:
ShapeVSObject-affected harmful factors

Solution Approach 1:

The phosphosilicate glass layer serves as an intermediary barrier during the polishing process. It selectively captures ions (especially potassium ions) from the polishing solution through ion exchange mechanisms, preventing these harmful ions from reaching and infiltrating the transistor's sensitive doped regions while allowing the polishing to proceed for surface planarization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The phosphosilicate glass layer, which contains phosphorus ions, converts the harmful effect of ion infiltration into a beneficial ion capture mechanism. The phosphorus ions in the PGS layer act as traps for potassium ions and other harmful ions from the polishing solution, effectively using the ion-exchange property to protect the transistor while the polishing process improves surface flatness.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The introduction of the phosphosilicate glass layer significantly reduces the probability of ions penetrating into the transistor, thereby improving the electrical properties and yield of the semiconductor device.

Implementation Method 1

the phosphorus ions contained in the phosphosilicate glass is good at grasping 1A or 2A ions (e.g., potassium ions) in the polishing solution

Methodology Applied
Scientific EffectIon exchange: Ion Exchange

Data Source

PatentUS20250126889A1Semiconductor structure with silicon-on-insulator substrate and the manufacturing method thereof
Publication Date: 2025.04.17 UNITED MICROELECTRONICS CORP
  • US20250126889A1 patent drawing
  • US20250126889A1 patent drawing
  • US20250126889A1 patent drawing

AI summary

The invention provides a semiconductor structure comprising a silicon-on-insulator (SOI) substrate, which comprises a silicon layer and an insulating layer stacked from bottom to top, a phosphosilicate glass (PGS) on the insulating layer, and a fluorosilicate glass (FSG) on the phosphosilicate glass. The probability of ions infiltrating into the transistor can be reduced and the yield of products can be improved.