SOI Semiconductor Structure for 3D Hall Sensor Integration

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Solution Overview

Problem

Existing semiconductor technologies face challenges in manufacturing cost-effective and reliable three-dimensional Hall sensors that can accurately measure all components of a magnetic field simultaneously, while maintaining electrical insulation and integration with CMOS transistors.

Innovation Solution

The development of a Silicon-On-Insulator (SOI) semiconductor structure with a three-dimensional Hall sensor structure, featuring a monolithic semiconductor body and integrated circuit, where a semiconductor layer is bonded to a substrate layer with an insulating layer, and terminal contacts are strategically positioned for rotational symmetry, allowing for the determination of all magnetic field components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a three-dimensional Hall sensor structure is manufactured using existing semiconductor technologies, then the sensor can measure magnetic field components, but the manufacturing cost and reliability are insufficient

Engineering Contradiction:
Improvemeasurement of magnetic field componentsVSAvoidmanufacturing reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The sensor structure is divided into separate functional regions: a sensor region containing the three-dimensional Hall sensor and a separate integrated circuit region. This segmentation allows independent optimization of each region for its specific function, improving overall manufacturing reliability while maintaining measurement precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An insulating layer is introduced as an intermediary between the sensor region and the integrated circuit region. This insulating layer provides electrical isolation, preventing interference between the sensitive Hall sensor and the digital circuitry, thereby improving manufacturing reliability without compromising measurement accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If a three-dimensional Hall sensor structure is manufactured using existing semiconductor technologies, then the sensor can measure magnetic field components, but the manufacturing cost is high

Engineering Contradiction:
Improvemeasurement of magnetic field componentsVSAvoidmanufacturing cost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The Hall sensor structure and the integrated circuit are merged into a single monolithic semiconductor body using SOI technology. This integration eliminates the need for separate packaging and interconnection processes, significantly reducing manufacturing cost while maintaining the capability to measure all three components of the magnetic field.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The invention transitions from planar two-dimensional sensor designs to a three-dimensional structure utilizing the vertical dimension of the SOI substrate. This dimensional change enables compact integration of the Hall sensor and readout circuitry within the same semiconductor body, reducing manufacturing complexity and cost while preserving full three-axis magnetic field measurement capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If the semiconductor body extends from buried lower surface to front side with multiple terminal contacts, then electrical connection is improved, but parasitic capacitances increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidparasitic capacitances
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The harmful parasitic capacitances are effectively removed from the signal path by using the insulating layer to electrically isolate the terminal contacts from the substrate. This extraction of parasitic effects maintains reliable electrical connection for current and voltage contacts while minimizing interference with the sensitive Hall voltage measurements.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the cost-effective and reliable manufacturing of highly sensitive Hall sensors capable of simultaneously measuring all magnetic field components, while maintaining electrical insulation and integration with CMOS transistors, reducing parasitic capacitances and manufacturing costs.

Implementation Method 1

An insulating layer is disposed between the substrate layer and the semiconductor layer

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

a three-dimensional Hall sensor structure having a sensor region made up of a monolithic semiconductor body

Methodology Applied
Scientific EffectHall effect: Hall Effect

Data Source

PatentUS11538855B2SOI semiconductor structure and method for manufacturing an SOI semiconductor structure
Publication Date: 2022.12.27 TDK MICRONAS GMBH
  • US11538855B2 patent drawing
  • US11538855B2 patent drawing
  • US11538855B2 patent drawing

AI summary

An SOI semiconductor structure, including a substrate layer formed on a back side and a semiconductor layer of a second conductivity type formed on a front side, an insulating layer being disposed between the substrate layer and the semiconductor layer, a three-dimensional Hall sensor structure having a sensor region made up of a monolithic semiconductor body being formed in the semiconductor layer, and the semiconductor body extending from an underside up to the front side, at least three first metallic terminal contacts being formed on the upper side, and at least three second metallic terminal contacts being formed on the underside, the first terminal contacts being offset with respect to the second terminal contacts in a projection perpendicular to the front side, each first terminal contact and each second terminal contact being formed in each case on a highly doped semiconductor contact region of a second conductivity type.