SOI Power Device Heat Sink Array for Thermal Uniformity
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Solution Overview
Problem
High power silicon-on-insulator (SOI) devices face significant heat dissipation challenges due to the low thermal conductance of the buried oxide layer, leading to non-uniform temperature distribution and potential device breakdown, with existing heat sink solutions consuming valuable device area and increasing on-state resistance.
Innovation Solution
A heat sink array with varying width and depth is integrated into the SOI device, where heat sinks are larger at the center and gradually reduce towards the edges, and can be subdivided into smaller plugs with increased spacing, optimizing thermal conductance and area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If uniform heat sinks are provided for all SOI devices, then heat dissipation is improved, but device area is consumed and on-state resistance increases
Solution Approach 1:
The patent applies local quality by providing heat sinks only to specific SOI devices based on their thermal environment. Central SOI devices receive heat sinks while edge devices do not, creating a non-uniform distribution that optimizes both heat dissipation and area utilization. This resolves the contradiction by making heat sink provision location-dependent rather than uniform across all devices.
2Temperature
If heat sinks are added to SOI devices, then thermal conductance is improved, but on-state resistance increases
Solution Approach 1:
The patent selectively provides heat sinks to central SOI devices while omitting them from edge devices. This local differentiation optimizes thermal conductance where needed (central devices generate more heat due to surrounding devices) while minimizing the negative impact on on-state resistance by limiting heat sink provision to only those devices that require additional thermal management.
3Temperature
If heat sinks are integrated into SOI devices, then temperature distribution becomes more uniform, but device complexity increases
Solution Approach 1:
The patent implements a simplified heat sink distribution pattern where only central SOI devices receive heat sinks while edge devices remain without them. This approach achieves more uniform temperature distribution across the device array while maintaining relatively simple device structure by avoiding the need for heat sinks at every location, thus resolving the contradiction between temperature uniformity and structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This arrangement achieves a substantially even temperature distribution across the device, preventing hot spots and reducing on-state resistance, while maintaining effective heat dissipation and minimizing area consumption.
Implementation Method 1
The heat sink 16 is typically arranged to transfer heat from the active area of the device 1 to the substrate 10
Data Source
Figure 1a~1b
Figure 2a~3b
Figure 4a~4b
AI summary
An integrated heat sink array is introduced in SOI power devices having multiple unit cells, which can be used to reduce the temperature rise in obtaining more uniform temperature peaks for all the unit cells across the device area, so that the hot spot which is prone to breakdown can be avoided, thus the safe operating area of the device can be improved. Also the array sacrifice less area of the device, therefore results in low Rdson.