SOI High-Voltage Transistor Structure for Higher Breakdown Voltage
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Solution Overview
Problem
Conventional techniques for integrating high-voltage transistors on semiconductor-on-insulator substrates are complex and costly, and the resulting devices often fail to sustain high voltage operations due to the limitations of the semiconductor layer in accommodating high voltage transistors.
Innovation Solution
A semiconductor device is designed with a bulk substrate, a semiconductor layer above it, and an insulating layer in between, featuring raised source and drain regions with epitaxial material, a gate dielectric with portions on both the bulk and semiconductor layers, and a gate electrode, along with a nitride layer on the gate spacer, which extends to cover the drain extension region, reducing the electric field and enhancing breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional techniques are used to integrate HV transistors on SOI substrates, then the devices can be manufactured, but the processing becomes complex and costly, and the devices fail to sustain high voltage operations
Solution Approach 1:
The device is segmented into distinct functional regions: a first region with the SOI structure containing the transistor channel, and a second region with the drift well formed in the bulk substrate. This segmentation allows each region to be optimized independently - the SOI region for low-voltage operation and the bulk region for high-voltage sustainment, thereby achieving high voltage capability without requiring complex processing throughout the entire device structure.
Solution Approach 2:
The invention applies local quality by creating a drift well specifically in the bulk substrate region beneath the drain, while maintaining the standard SOI structure in the channel region. The drift well is locally doped to provide high voltage sustainment only where needed, rather than requiring complex processing across the entire device. This localized approach enables high voltage operation without increasing overall device complexity.
2Reliability
If conventional techniques are used to integrate HV transistors on SOI substrates, then the devices can be manufactured, but the manufacturing cost increases
Solution Approach 1:
By segmenting the device into SOI and bulk regions with distinct functions, the invention avoids the need for complex processing steps across the entire device. The drift well is formed only in the bulk substrate region using standard doping techniques, which are already part of conventional SOI manufacturing processes. This segmentation strategy enables high voltage capability to be added without significantly increasing manufacturing complexity or cost.
Solution Approach 2:
The bulk substrate serves multiple functions: it provides mechanical support for the SOI structure and simultaneously hosts the drift well for high voltage sustainment. This multi-functionality eliminates the need for separate high voltage processing steps, allowing high voltage capability to be integrated using existing manufacturing infrastructure, thereby controlling costs.
3Ease of operation
If the semiconductor layer in SOI substrates is used, then low-voltage devices can operate, but the layer cannot accommodate HV transistors due to its thin structure
Solution Approach 1:
The invention segments the device functionality by spatial separation: the thin SOI semiconductor layer handles low-voltage signal operations in the channel region, while the bulk substrate with the drift well handles high-voltage sustainment in the drain region. This segmentation allows each layer to operate within its optimal voltage range without compromising the other, enabling both low-voltage operation and high voltage capability.
Solution Approach 2:
The invention transitions from a two-dimensional planar structure to a three-dimensional vertical structure by forming the drift well beneath the SOI layer. This dimensional change allows the high voltage field to be managed in the vertical direction through the bulk substrate, while the thin SOI layer maintains its low-voltage operation in the horizontal plane, effectively decoupling the voltage requirements.
Data Source
AI summary
The present disclosure generally to semiconductor devices, and more particularly to semiconductor devices having high-voltage transistors integrated on a semiconductor-on-insulator substrate and methods of forming the same. The present disclosure provides a semiconductor device including a bulk substrate having an upper surface, a semiconductor layer above the bulk substrate, an insulating layer between the semiconductor layer and the bulk substrate, a source region and a drain region on the bulk substrate, the source region and the drain region are raised above the upper surface of the bulk substrate, in which the source region and the drain region include an epitaxial semiconductor material, a gate dielectric between the source region and the drain region, the gate dielectric having a first portion on the bulk substrate and a second portion on the semiconductor layer, and a gate electrode above the gate dielectric.