SOI Image Sensor Pixel Architecture for Dark Current Reduction
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Solution Overview
Problem
Current image sensors face challenges in miniaturizing pixels while maintaining high quality and efficiency, particularly in backside illumination configurations, which affects their sensitivity and photo-receiving capabilities.
Innovation Solution
The proposed image sensor design incorporates a Silicon on Insulator (SOI) substrate with a buried insulating film that exposes specific regions, allowing for the integration of operating and transfer gate structures of different conductive types, enabling the formation of miniaturized pixels and optimizing circuit elements based on active regions, thereby reducing dark current and improving light collection efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If pixels are miniaturized to reduce sensor size, then device dimensions are reduced, but photo-receiving efficiency and sensitivity deteriorate
Solution Approach 1:
The patent transitions from planar 2D pixel arrangement to a 3D stacked architecture using SOI substrates. The buried insulating film creates vertical separation between pixel regions, allowing light to be collected from multiple depth levels and directions, thereby maintaining photo-receiving efficiency while reducing horizontal pixel dimensions.
Solution Approach 2:
The patent employs composite material structures including SOI substrates combining silicon layers with buried insulating films, and integrates multiple functional layers (photodetectors, transfer gates, floating diffusion regions) with different material properties. This composite approach enables simultaneous optimization of light collection, charge transfer, and signal processing within miniaturized pixel volumes.
2Length of moving object
If pixels are miniaturized, then device dimensions are reduced, but manufacturing complexity increases
Solution Approach 1:
The patent segments the pixel structure into distinct functional regions separated by the buried insulating film: photodetector regions for light collection, transfer gate regions for charge movement, and floating diffusion regions for signal processing. This segmentation allows each component to be optimized independently while maintaining compact overall pixel dimensions through vertical integration.
3Ease of manufacture
If conventional substrate structures are used, then manufacturing is simpler, but dark current increases and current characteristics deteriorate
Solution Approach 1:
The buried insulating film acts as an intermediary layer between the photodetector and substrate, electrically isolating the pixel region from the substrate. This intermediary structure blocks dark current paths while maintaining structural support, and enables independent optimization of each layer's electrical characteristics without compromising fabrication feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables the creation of image sensors with reduced pixel size and enhanced quality by minimizing single channel effects, reducing dark current, and optimizing transistor types for improved current characteristics and reduced flicker noise.
Implementation Method 1
An image sensor is one of various semiconductor elements that convert optical information into an electric signal
Data Source
AI summary
An image sensor includes a first semiconductor substrate, a photoelectric conversion region in the first semiconductor substrate, and a buried insulating film on the first semiconductor substrate. The buried insulating film covers a first region of the first semiconductor substrate and exposes a second region of the first semiconductor substrate. The sensor includes a second semiconductor substrate on the buried insulating film, an operating gate structure defining a first channel of a first conductive type in the second semiconductor substrate, and a transfer gate structure defining a second channel of a second conductive type different from the first conductive type in the second region of the first semiconductor substrate.