SOI Insulation Wall Penetrating Substrate to Prevent Cavities
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Solution Overview
Problem
Existing insulation walls between transistors on SOI substrates are prone to cavities formation during cleaning processes, leading to short-circuits and performance issues due to the etching of thin insulator layers, which can result in transistor failure.
Innovation Solution
An insulation wall structure comprising a vertical portion crossing the thin semiconductor and insulating layers and penetrating into the substrate with lateral extensions under the insulating layer, formed using silicon or germanium for the semiconductor layer, silicon oxide for the insulating material, and silicon for the substrate, which is manufactured by etching partial trenches, protecting the sides, and filling with an insulator to prevent cavity formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the insulating layer thickness is reduced to maintain active silicon area space, then the transistor performance is improved, but the risk of cavity formation during cleaning increases
Solution Approach 1:
The insulation wall is extended into a third dimension by penetrating through the thin insulating layer and into the substrate below. This vertical extension into the substrate provides mechanical support and prevents cavity formation during cleaning operations, while the wall still provides lateral insulation at the surface level, thus preserving the active silicon area.
Solution Approach 2:
The insulation wall is formed to penetrate into the substrate before the cleaning operations are performed. This preliminary structural reinforcement prevents the thin insulating layer from being etched away and forming cavities during subsequent cleaning steps with hydrofluoric acid.
2Reliability
If the insulating layer thickness is increased to prevent cavity formation, then the transistor reliability is improved, but the active silicon area space is reduced
Solution Approach 1:
Instead of increasing the insulating layer thickness in the horizontal plane (which would reduce active silicon area), the solution extends the insulation wall vertically into the substrate. This dimensional change provides the necessary mechanical support for reliability without consuming additional lateral space.
3Ease of manufacture
If the insulation wall structure is simplified without lateral extensions, then the manufacturing process is easier, but cavity formation during cleaning occurs
Solution Approach 1:
The insulation wall structure is segmented into two functional parts: a lateral portion providing insulation at the surface level, and a vertical portion penetrating into the substrate providing mechanical support. This segmentation allows each part to fulfill its specific function efficiently.
Solution Approach 2:
The insulation wall has different properties in different regions: the upper portion provides lateral insulation, while the lower portion extending into the substrate provides mechanical reinforcement. This local differentiation of function prevents cavity formation without requiring uniform thickening throughout the structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed insulation wall effectively reduces the risk of cavity formation during cleaning, maintains active silicon area space, and enhances transistor performance by limiting the extension of cavities into the substrate, while allowing for a simpler manufacturing process without additional masking steps.
Implementation Method 1
trenches 4 are made to cross layers 1 and 2 and to penetrate into substrate 3
Implementation Method 2
These acids etch field oxide 5, more specifically in regions located at the periphery of the field oxide regions
Implementation Method 3
the insulating layer and the insulating material of the wall are made of silicon oxide
Data Source
AI summary
An insulation wall separating transistors formed in a thin semiconductor layer resting on an insulating layer laid on a semiconductor substrate, this wall being formed of an insulating material and comprising a wall crossing the thin layer and the insulating layer and penetrating into the substrate, and lateral extensions extending in the substrate under the insulating layer.