SOI Charge Trap Interface Structure for Robust Uniform Isolation
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Solution Overview
Problem
Current semiconductor-on-insulator (SOI) devices face degradation in isolation performance due to the formation of a high conducting charge layer at the insulating and substrate interface, which is costly to address through deep trench implantation and limited to specific areas, necessitating a solution for robust and uniform isolation across the SOI structure.
Innovation Solution
A charge trap layer is formed throughout the insulating/substrate interface, eliminating the need for deep trench implantation and providing uniform robust isolation across the SOI structure by extending across the entire substrate, preventing charge buildup and reducing cross-talk between devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deep trench implantation is used to prevent charge layer formation, then isolation performance is improved in specific areas, but manufacturing cost increases and the solution is limited to specific areas only
Solution Approach 1:
The patent applies local quality by forming a charge trap layer specifically at the insulating/substrate interface where charge buildup occurs, rather than treating the entire substrate uniformly. This targeted approach addresses isolation performance issues at the critical interface region while avoiding unnecessary processing elsewhere, thereby improving isolation performance without proportionally increasing manufacturing cost across the entire device.
Solution Approach 2:
The patent segments the isolation solution into two distinct components: a charge trap layer formed at the insulating/substrate interface and a standard buried oxide layer. This segmentation allows the charge trap layer to specifically address charge buildup at the critical interface while the buried oxide provides general isolation, enabling targeted improvement of isolation performance without requiring deep trench implantation across the entire substrate.
2Reliability
If deep trench implantation is used to address charge layer formation, then isolation performance is improved, but device complexity increases due to additional processing steps
Solution Approach 1:
The patent applies preliminary action by forming the charge trap layer at the insulating/substrate interface before final device assembly and operation. This advance preparation prevents charge buildup from occurring in the first place, eliminating the need for complex deep trench implantation processing steps and reducing overall device complexity while maintaining improved isolation performance.
3Reliability
If specific area implantation is used to prevent charge buildup, then isolation performance is improved in those areas, but uniform isolation across the entire SOI structure is not achieved
Solution Approach 1:
The patent applies universality by designing a charge trap layer that can be formed across the entire insulating/substrate interface, providing uniform isolation improvement across the whole SOI structure. This universal approach replaces area-specific implantation with a global solution that maintains consistent isolation performance throughout the device, achieving both improved reliability and manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances isolation performance and reduces manufacturing costs by eliminating the need for specific area implantation, achieving better leakage performance and uniform isolation across the SOI structure.
Implementation Method 1
a charge trap layer may be built across the insulating/substrate interface
Data Source
AI summary
This disclosure provides for robust isolation across the SOI structure. In contrast to forming a charge trap layer in specific areas on the structure, a charge trap layer may be built across the insulating/substrate interface. The charge trap layer may be an implantation layer formed throughout and below the insulation layer. Devices built on this SOI structure have reduced cross-talk between the devices. Due to the uniform structure, isolation is robust across the structure and not confined to certain areas. Additionally, deep trench implantation is not required to form the structure, eliminating cost. The semiconductor-on-insulator substrate may include an active silicon layer over an oxide layer. The oxide layer may be over a charge trap layer. The charge trap layer may be over a silicon substrate.