SOI MBCFET Source/Drain Epitaxy Using a Seed Layer
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Solution Overview
Problem
The challenge in manufacturing Multi Bridge Channel Field Effect Transistors (MBCFET) using a silicon on insulator (SOI) substrate is that the exposed insulation layer hinders the use of the substrate as a seed for selective epitaxial growth (SEG), making it difficult to form effective source/drain layers.
Innovation Solution
A semiconductor device with a silicon on insulator (SOI) substrate, featuring gate structures, vertically extending channels, a silicon-germanium seed layer, and a source/drain region with a concave-convex shape, where the seed layer is used as a seed for the SEG process to form the source/drain layer effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an opening is formed to form a source/drain layer on an SOI substrate, then the upper portion of the substrate is exposed, but the exposed insulation layer prevents the substrate from being used as a seed for selective epitaxial growth
Solution Approach 1:
A separate seed layer is introduced as an intermediary between the exposed insulation layer and the source/drain layer. This seed layer serves as the effective substrate for selective epitaxial growth, decoupling the requirements of exposure (for source/drain formation) and seeding (for crystal growth). The seed layer mediates between the insulating substrate surface and the epitaxial growth process, enabling both functions to coexist.
Solution Approach 2:
The seed layer is formed in advance before the source/drain layer deposition. This preliminary action ensures that the substrate surface is properly prepared for selective epitaxial growth before the actual source/drain formation process begins. By pre-establishing the seed layer, the system ensures reliable crystal growth while maintaining the exposed substrate structure needed for subsequent processing.
2Ease of manufacture
If a flat seed layer is used, then the manufacturing process is simple, but the source/drain region cannot achieve optimal electrical characteristics
Solution Approach 1:
The seed layer is designed with non-uniform thickness, creating different local qualities across its surface. The variable thickness profile (concave-convex shape) provides different seed characteristics in different regions, enabling the source/drain region to achieve optimal electrical characteristics in specific areas while maintaining overall manufacturability. This local variation in seed layer quality directly improves the electrical performance of the resulting source/drain structures.
Solution Approach 2:
The thickness parameter of the seed layer is varied across different regions rather than maintaining a constant value. By changing the thickness parameter locally, the system optimizes the electrical characteristics of the source/drain region. The concave-convex thickness profile allows for tailored epitaxial growth rates and material properties in different areas, improving overall device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves electrical characteristics by enabling effective formation of the source/drain layer, enhancing the semiconductor device's performance and manufacturing efficiency.
Implementation Method 1
a seed layer under an opening that is formed on a SOI substrate, the seed layer may be used as a seed for a SEG process, and thus a source/drain layer may be effectively formed
Data Source
AI summary
A semiconductor device, including a silicon on insulator (SOI) substrate is disclosed. The device may include gate structures formed on the SOI substrate and being spaced apart from each other in a horizontal direction, and a plurality of channels spaced apart from each other in a vertical direction. Each of the channels may extend through each of the gate structures in the horizontal direction. The device may include a seed layer and a source/drain region. The source/drain region may be connected to the channels, and each sidewall of the source/drain region in the horizontal direction may have a concave-convex shape. The device may include a protruding portion of the source/drain region formed between the gate structures that protrudes in the horizontal direction compared to a non-protruding portion of the source/drain region formed between the channels.