CMOS Compatible MEMS Microphone Using SOI Substrate
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Solution Overview
Problem
Existing silicon-based MEMS microphones are not compatible with CMOS processes, leading to issues with intrinsic stress and inconsistent mechanical compliance, affecting manufacturing yield and device performance.
Innovation Solution
A CMOS compatible MEMS microphone is developed using a silicon-on-insulator (SOI) substrate with a conductive diaphragm and a backplate featuring CMOS passivation layers, through holes, and dimples, forming a variable capacitive sensing element with an air gap, allowing sound to pass through and reducing stress susceptibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a floating diaphragm made of lower stress polysilicon is used, then mechanical compliance consistency is improved, but CMOS process compatibility is lost
Solution Approach 1:
The patent changes the material parameter from polysilicon to silicon-on-insulator (SOI) layer, which has different stress characteristics. The SOI layer with appropriate thickness and doping can achieve low stress while being compatible with CMOS fabrication processes, thus resolving the contradiction between mechanical compliance consistency and CMOS compatibility
Solution Approach 2:
The patent uses the silicon device layer from the CMOS substrate itself as the diaphragm material, copying the existing low-stress silicon layer rather than adding a separate polysilicon layer. This approach eliminates the need for additional low-stress polysilicon deposition steps while maintaining stress control, achieving both CMOS compatibility and mechanical compliance consistency
2Ease of manufacture
If a diaphragm made of CMOS thin films is used, then CMOS process compatibility is improved, but intrinsic stress control becomes difficult
Solution Approach 1:
The patent applies local quality by selectively using the silicon device layer only in the diaphragm region where low stress is required, while other regions of the CMOS substrate can have different properties. The silicon device layer's inherent low stress characteristic is localized to the diaphragm area, achieving stress control where needed while maintaining overall CMOS compatibility
Solution Approach 2:
The patent changes the film parameter from generic CMOS thin films to specifically the silicon device layer with controlled thickness and doping. This parameter change ensures the material has inherently low intrinsic stress while remaining compatible with CMOS processes, resolving the contradiction between ease of manufacture and stress control
3Manufacturing precision
If low stress polysilicon is used for the diaphragm, then mechanical compliance is improved, but substrate resistivity requirements increase
Solution Approach 1:
The patent copies the existing silicon device layer from the CMOS substrate to form the diaphragm, utilizing the substrate's own material properties. This eliminates the need for separate low-stress polysilicon deposition and the associated substrate resistivity requirements, achieving mechanical compliance improvement without adding manufacturing constraints
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution simplifies processing, improves performance, and enhances manufacturing yield by using a stress-free silicon layer, making the microphone structure fully compatible with CMOS processes and reducing the risk of intrinsic stress.
Implementation Method 1
forming a variable capacitive sensing element with an air gap, allowing sound to pass through
Data Source
AI summary
The present invention relates to a CMOS compatible MEMS microphone, comprising: an SOI substrate, wherein a CMOS circuitry is accommodated on its silicon device layer; a microphone diaphragm formed with a part of the silicon device layer, wherein the microphone diaphragm is doped to become conductive; a microphone backplate including CMOS passivation layers with a metal layer sandwiched and a plurality of through holes, provided above the silicon device layer, wherein the plurality of through holes are formed in the portions thereof opposite to the microphone diaphragm, and the metal layer forms an electrode plate of the backplate; a plurality of dimples protruding from the lower surface of the microphone backplate opposite to the diaphragm; and an air gap, provided between the diaphragm and the microphone backplate, wherein a spacer forming a boundary of the air gap is provided outside of the diaphragm or on the edge of the diaphragm.