SOI MOS Transistor Characterization via Backside Capacitance
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Solution Overview
Problem
Current methods for extracting equivalent oxide thickness (EOT) and effective work function (Weff) parameters from MOS stacks on SOI substrates are unreliable and difficult to reproduce, especially due to challenges in accessing the flat band voltage and accurately determining capacitance characteristics.
Innovation Solution
A method involving the application of a direct main voltage and alternating voltage to the rear face of the SOI substrate to measure capacitance, allowing for the determination of flat band voltage and extraction of EOT and Weff parameters by adjusting the measured capacitance characteristics to match those of a theoretical model for a solid substrate, focusing on the depletion mode range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional C(V) measurement methods are used on SOI substrates, then measurement simplicity is maintained, but measurement precision and reliability of EOT and Weff parameters deteriorate due to inability to access flat band voltage
Solution Approach 1:
The measurement process is segmented into two distinct capacitance measurements: Cgc (gate-to-channel) and Cgb (gate-to-backside). By separating these measurements and combining them appropriately, the method accesses information about flat band voltage that is unavailable in traditional single-measurement approaches, thereby improving parameter extraction accuracy without requiring complex additional equipment.
Solution Approach 2:
The backside of the SOI substrate serves as an intermediary element that enables access to flat band voltage information. By measuring capacitance between the gate and the backside (Cgb) and combining it with the gate-to-channel measurement (Cgc), the method obtains comprehensive electrical characteristics that improve EOT and Weff determination accuracy.
2Reliability
If C(V) characteristics are measured without accessing flat band voltage, then measurement procedure remains simple, but parameter extraction reliability deteriorates
Solution Approach 1:
Instead of trying to directly measure flat band voltage through traditional front-side C(V) methods which fail on SOI substrates, the method inverts the approach by measuring from the backside of the substrate. By applying voltage to the backside and measuring the resulting capacitance, the method successfully accesses flat band voltage information that is otherwise inaccessible, thereby improving measurement reliability.
3Manufacturing precision
If conventional parameter extraction methods are used, then processing time is reduced, but manufacturing precision of MOS transistor performance deteriorates
Solution Approach 1:
The method performs preliminary measurements of both Cgc and Cgb capacitances under various bias conditions before extracting EOT and Weff parameters. By gathering comprehensive electrical characteristic data in advance through these systematic measurements, the method enables more accurate parameter extraction that improves MOS transistor performance control, despite requiring additional measurement steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables reliable and reproducible extraction of EOT and Weff parameters, improving the accuracy and reliability of MOS transistor characterization on SOI substrates by simplifying the determination of these critical parameters.
Implementation Method 1
measure the electric current Ig(t) from the front face gate and determine from this measurement the capacitance Cbg between the rear face of the transistor substrate and the front face gate
Data Source
Figure 1a~1b
Figure 2A~2b
Figure 3a~3b
AI summary
The invention relates to a method for measuring a set of parameters of a MOS transistor on a solid-state substrate, said set of parameters including at least the flat band voltage at the back face of the buried oxide, said method comprising the following steps: - applying to the back face of the transistor substrate a DC main voltage Vbs and an AC voltage v(t); - measuring the electric current Ig(t) from the front-face gate and determining the capacitance Cbg between the back face of the transistor substrate and the front-face gate; - determining the set of parameters by fitting the characteristic Cbg(Vgb) to a theoretical model describing the behavior of a MOS transistor on a solid substrate, said set of parameters being able to include the effective work output of the gate metal Weff and the equivalent oxide thickness EOT.