SOI MOSFET Charge Sink for Gate Oxide Reliability
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Solution Overview
Problem
SOI MOSFETs face performance issues due to accumulated charge, which affects linearity, harmonic distortion, intermodulation distortion, and gate oxide reliability, particularly in RF switching circuits, leading to increased harmonic distortion and reduced drain-to-source breakdown voltage.
Innovation Solution
Implementing an Accumulated Charge Sink (ACS) with high impedance to remove or control accumulated charge in SOI MOSFETs, thereby reducing nonlinearity and improving gate oxide reliability by managing the electric field across the gate oxide.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If gate oxide thickness is reduced to improve device performance and linearity, then device speed and transconductance improve, but gate oxide reliability deteriorates due to increased electric field stress and accumulated charge effects
Solution Approach 1:
An accumulated charge sink (ACS) structure is introduced as an intermediary element coupled to the body region. This ACS actively removes accumulated charge carriers (holes in NMOS, electrons in PMOS) that would otherwise build up under the gate oxide during off-state operation. By providing this charge removal pathway, the ACS mediates between the thin gate oxide structure and the charge accumulation problem, enabling thin oxides to operate reliably without excessive electric field stress or charge-induced degradation.
2Manufacturing precision
If gate oxide thickness is reduced to improve linearity, then harmonic distortion decreases, but breakdown voltage decreases due to higher electric field stress
Solution Approach 1:
The invention converts the potentially harmful effect of charge accumulation into a beneficial mechanism. The ACS structure intentionally creates a controlled charge removal pathway that prevents harmful charge buildup. By allowing charge to be actively sunk through the ACS rather than accumulating under the gate, the system transforms what would be a reliability hazard into a mechanism that protects the thin gate oxide, thereby enabling both high linearity and adequate breakdown voltage.
3Device complexity
If accumulated charge is allowed to build up in the body region, then device simplicity is maintained, but harmonic distortion and intermodulation distortion increase
Solution Approach 1:
The invention extracts the accumulated charge carriers from the body region by providing a dedicated removal pathway through the ACS structure. This extraction mechanism selectively removes holes in NMOS devices or electrons in PMOS devices that would otherwise accumulate during off-state operation. By taking out these charge carriers, the system eliminates the source of harmonic and intermodulation distortion while adding only a minimal structural element (the ACS coupling), thus maintaining overall device simplicity while solving the distortion problem.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces harmonic distortion, intermodulation distortion, and improves linearity and gate oxide reliability, allowing for thinner gate oxides with increased gate bias magnitude without compromising breakdown voltage.
Implementation Method 1
Implementing an Accumulated Charge Sink (ACS) with high impedance to remove or control accumulated charge in SOI MOSFETs, thereby reducing nonlinearity and improving gate oxide reliability by managing the electric field across the gate oxide
Data Source
AI summary
A method and apparatus are disclosed for use in improving gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit includes a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.


