SOI MOSFET Conductivity Layout for Stable Current Paths

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Solution Overview

Problem

MOSFETs formed in an SOI substrate face challenges in stabilizing operations.

Innovation Solution

A semiconductor device manufacturing method involving the formation of a semiconductor structure with specific conductivity type regions, including a first semiconductor part, a second semiconductor part, and a third semiconductor part, using tilted ion-implantation and multiple masks to create stable conductivity paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a MOSFET is formed in an SOI substrate to increase operation speed, then the operation speed is improved, but the operation stability deteriorates

Engineering Contradiction:
Improveoperation speedVSAvoidoperation stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies local quality by creating distinct conductivity type regions (first conductivity type and second conductivity type) within the semiconductor substrate at different locations. This allows different regions to have different electrical properties, enabling stable potential fixation in specific areas while maintaining high-speed operation in the channel region. The selective formation of these regions addresses the stability issue without compromising the overall device speed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The semiconductor substrate is segmented into multiple functional regions with different conductivity types, including first conductivity type regions, second conductivity type regions, and third conductivity type regions. This segmentation allows independent optimization of each region's electrical characteristics, enabling the device to achieve both high-speed operation in the channel and stable potential fixation in the segmented conductivity regions, thereby resolving the contradiction between speed and stability.

Inventive Principle:
Principle #1Segmentation

2Reliability

If tilted ion-implantation is used to form conductivity type regions, then continuous current paths are ensured, but the manufacturing process complexity increases

Engineering Contradiction:
Improvecontinuous current pathVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs tilted ion-implantation, which introduces a angular dimension to the implantation process. By implanting ions at a tilt angle rather than perpendicular to the surface, the method creates continuous current paths that extend laterally through the substrate. This dimensional approach ensures reliable current flow while the use of multiple masks maintains process control, balancing reliability improvement with manageable manufacturing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The manufacturing process uses multiple masks formed at different stages to predefine the regions where ion-implantation will occur. The first mask, second mask, and third mask are formed sequentially to prepare the substrate for subsequent implantation steps. This preliminary action ensures that conductivity type regions are formed in the correct locations before ion-implantation, guaranteeing continuous current paths while organizing the complex manufacturing process into manageable sequential steps.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Stabilizes the operations of the semiconductor device by ensuring continuous current paths and equal source-drain symmetry, allowing for stable potential fixation and reduced device size.

Implementation Method 1

forming a first semiconductor part in a part of the semiconductor part not covered with the electrode and in a part of the semiconductor part that is covered with the electrode and contacts the part of the semiconductor part not covered with the electrode, the first semiconductor part being of a first conductivity type, the forming of the first semiconductor part including using the electrode as a mask to ion-implant an impurity

Methodology Applied
Scientific EffectIon-implantation: Ion Implantation

Data Source

PatentUS20250331254A1Semiconductor device and method for manufacturing same
Publication Date: 2025.10.23 KK TOSHIBA
  • US20250331254A1 patent drawing
  • US20250331254A1 patent drawing
  • US20250331254A1 patent drawing

AI summary

A method for manufacturing a semiconductor device includes forming an electrode on a structure body. The structure body includes a first insulating film, a second insulating film, and a semiconductor part. The electrode includes a first electrode part and a second electrode part. The first electrode part extends in a first direction and travers a region directly above the semiconductor part. The second electrode part extends from the first electrode part in a second direction. The method includes forming a first semiconductor part. The method includes forming a first mask on the structure body. The method includes forming a second semiconductor part in a portion of the first semiconductor part by using the first mask and the electrode as a mask to ion-implant an impurity. The method includes removing the first mask. The method includes forming a contact connected to the one part.