SOI Power MOSFET Die with Variable Silicon Layer Thickness

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Solution Overview

Problem

Existing silicon-on-insulator (SOI) technology faces challenges in accommodating both high-voltage and low-voltage devices in the same Si device layer, leading to high series resistance and suboptimal performance for high-voltage devices, respectively.

Innovation Solution

A selective epitaxial growth process is applied to increase the thickness of specific regions in the Si device layer before forming field oxide structures, allowing for the integration of high and low breakdown voltage devices without modifying existing front-end processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a thin Si device layer is used in SOI technology, then breakdown voltage control is improved, but series resistance increases for high voltage devices

Engineering Contradiction:
Improvebreakdown voltage controlVSAvoidseries resistance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies selective epitaxial growth to create regions of different Si layer thicknesses within the same device. High voltage devices are formed in regions with thicker Si layers (reducing series resistance), while low voltage devices are formed in regions with thinner Si layers (maintaining breakdown voltage control). This local differentiation resolves the contradiction by allowing each device type to operate in its optimal thickness regime.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The Si device layer is segmented into multiple thickness regions through selective epitaxial growth. The process divides the uniform thin Si layer into thinner regions (for low voltage devices) and thicker regions (for high voltage devices), enabling both device types to coexist in the same SOI substrate without compromising their respective performance requirements.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a thick Si device layer is used, then series resistance decreases for high voltage devices, but breakdown voltage control deteriorates

Engineering Contradiction:
Improveseries resistanceVSAvoidbreakdown voltage control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of using a uniformly thick Si layer, the patent creates local thickness variations through selective epitaxial growth. High voltage devices are positioned in thicker Si regions where lower series resistance is achieved, while low voltage devices are positioned in thinner Si regions where precise breakdown voltage control is maintained. This resolves the contradiction by allowing both thickness requirements to be satisfied in different locations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The Si device layer is segmented into multiple thickness zones, with thicker regions providing low series resistance for high voltage devices and thinner regions providing precise breakdown voltage control for low voltage devices. This segmentation allows the system to overcome the limitation of having to choose between thick and thin uniform layers.

Inventive Principle:
Principle #1Segmentation

3Reliability

If different Si layer thicknesses are used for high and low voltage devices, then device performance is improved, but process complexity increases

Engineering Contradiction:
Improvedevice performanceVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The selective epitaxial growth is performed early in the fabrication process, before field oxide formation and device implantation steps. This preliminary thickness differentiation is established once, and subsequent processing steps can proceed uniformly across the entire wafer without requiring additional thickness-specific operations, thereby limiting the increase in process complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the physical parameter of Si layer thickness through controlled epitaxial growth in selected regions. By modifying the thickness parameter locally before subsequent processing steps, the invention enables different device performances without fundamentally changing the overall process flow, thus achieving performance improvement with moderate complexity increase.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces on-state resistance for high-voltage devices and maintains performance for low-voltage devices, enabling monolithic integration of both types without altering existing fabrication processes.

Implementation Method 1

selectively growing epitaxial silicon on the one or more second regions of the silicon device layer exposed by the hard mask such that the thickness of the one or more second regions is increased

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20250280558A1Semiconductor die having a variable thickness device layer
Publication Date: 2025.09.04 INFINEON TECH AUSTRIA AG
  • US20250280558A1 patent drawing
  • US20250280558A1 patent drawing
  • US20250280558A1 patent drawing

AI summary

A semiconductor die includes: a silicon-on-insulator (SOI) substrate having a silicon device layer, a bulk silicon substrate, and a buried oxide layer separating the silicon device layer from the bulk silicon substrate; a lateral power MOSFET (metal-oxide-semiconductor field-effect transistor) in a first device region of the silicon device layer; and an additional semiconductor device in a second device region of the silicon device layer and having a lower breakdown voltage than the lateral power MOSFET. The silicon device layer has a first thickness in a first part of the first device region and a second thickness in a second part of the first device region, the second thickness being greater than the first thickness. The silicon device layer has the first thickness throughout the second device region. Additional semiconductor die embodiments are also described.