SOI NCFET Structure With Single Ferroelectric Layer for Faster Switching
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Solution Overview
Problem
Existing NCFET transistors with ferroelectric layers in FDSOI substrates have complex structures and costly fabrication processes, limiting control of electric current and switching speed, and integration with back gates.
Innovation Solution
A simplified NCFET transistor design using a semiconductor-on-insulator substrate with a single ferroelectric layer in direct contact with the support substrate, allowing for faster switching and improved coupling with the back gate, featuring a semiconductor active layer and a gate dielectric for electrical insulation and negative capacitance control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ferroelectric layer and polycrystalline silicon layer are inserted between the support substrate and buried oxide layer, then negative capacitance is achieved to modulate switching voltage, but the substrate structure becomes complex and fabrication becomes complicated and expensive
Solution Approach 1:
The patent removes the polycrystalline silicon layer from the substrate structure, retaining only the ferroelectric layer between the support substrate and buried oxide. This extraction of the unnecessary polycrystalline silicon component simplifies the substrate structure while preserving the negative capacitance effect and switching voltage modulation capability.
Solution Approach 2:
The patent employs a composite substrate structure consisting of the support substrate, ferroelectric layer, and buried oxide layer. This composite structure achieves the desired electrical properties through the combination of materials with different functionalities, eliminating the need for additional polycrystalline silicon layers.
2Reliability
If a ferroelectric layer and polycrystalline silicon layer are inserted between the support substrate and buried oxide layer, then negative capacitance is achieved to modulate switching voltage, but the fabrication process becomes complicated and expensive
Solution Approach 1:
The patent removes the polycrystalline silicon layer from the fabrication sequence, significantly simplifying the manufacturing process. This extraction eliminates the complex steps required to deposit, pattern, and integrate polycrystalline silicon, while the ferroelectric layer alone suffices to provide negative capacitance and switching voltage modulation.
Solution Approach 2:
The patent changes the material composition parameter of the substrate by replacing the ferroelectric-polycrystalline silicon composite with a ferroelectric-only structure. This parameter change simplifies the fabrication process while maintaining the essential electrical characteristics for switching voltage modulation.
3Stability of the object's composition
If the active layer thickness is reduced to less than or equal to 20 nm, then full depletion is achieved, but control of electric current and switching speed are limited
Solution Approach 1:
The patent introduces the ferroelectric layer as an intermediary between the support substrate and the active layer. This intermediary provides negative capacitance that amplifies the electric field in the channel, enabling faster switching speeds and better current control even with ultra-thin active layers that achieve full depletion.
Solution Approach 2:
The patent changes the electrical parameters of the substrate by introducing negative capacitance through the ferroelectric layer. This parameter change enables the ultra-thin active layer to achieve both full depletion and high switching speed by enhancing the electric field control without increasing the active layer thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves better control of electric current, faster switching, and improved on-off current ratios, suitable for high-performance microprocessors and large-scale integration applications.
Implementation Method 1
The ferroelectric layer gives the back of the buried oxide layer a negative capacitance that is intended to apply a reverse bias suitable for modulating the switching voltage of the transistor
Implementation Method 2
the ability to form a negative capacitance under the active layer, making it possible to control the threshold voltage of the transistor through the polarization of the ferroelectric layer
Data Source
AI summary
An NCFET transistor comprises a semiconductor-on-insulator substrate for a field-effect transistor, and the NCFET transistor successively comprises, from its base to its surface: a semiconductor carrier substrate; a single ferroelectric layer, arranged in direct contact with the carrier substrate, which layer is designed to be biased so as to form a negative capacitance; and an active layer of a semiconductor material, which layer is designed to form the channel of the transistor, and is arranged in direct contact with the ferroelectric layer. The NCFET transistor further comprises a channel that is arranged in the active layer, a source and a drain that are arranged in the active layer on either side of the channel, and a gate that is arranged on the channel and is insulated from the channel by a gate dielectric.