SOI Optical Waveguide Leakage Prevention for CMOS Integration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The integration of silicon photonics and CMOS processes is hindered by the mismatch in the required thickness of the SiO2 layer, as silicon photonics demands a 2 μm thickness for light confinement, while CMOS processes typically use substrates with SiO2 layers ranging from 100 to 200 nm, leading to performance sacrifices or separate integration of circuits.

Innovation Solution

An optical device utilizing an SOI substrate with an embedded insulating layer of 200 nm or less, featuring a Group III-V compound semiconductor optical waveguide and an optical leakage preventing layer within the substrate to prevent light leakage, enabling integration with CMOS elements and achieving a perfect match between silicon photonics and CMOS processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the SiO2 layer thickness is increased to 2 μm for light confinement in silicon photonics, then light propagation loss is reduced, but the substrate thickness becomes incompatible with standard CMOS processes which use 100-200 nm SiO2 layers

Engineering Contradiction:
Improvelight propagation lossVSAvoidcompatibility with CMOS processes
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The SiO2 layer is segmented into two distinct parts: a thin SiO2 layer (100-200 nm) compatible with CMOS processes and a thick SiO2 layer (2 μm) for light confinement. This segmentation allows each layer to fulfill its specific function while resolving the thickness contradiction between CMOS compatibility and optical performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the SiO2 layer structure are assigned different thicknesses based on their functional requirements. The lower SiO2 layer maintains thin thickness for CMOS process compatibility, while the upper SiO2 layer achieves thick thickness for effective light confinement in the optical waveguide region.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the SiO2 layer is etched away to form an air bridge for improved light confinement, then light propagation loss is reduced, but the structural complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvelight propagation lossVSAvoidstructural complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The air layer is extracted from the SiO2 layer by selective etching, creating an air bridge structure that provides superior light confinement. This extraction removes the problematic SiO2 material in the critical region while maintaining the overall structural integrity through the remaining SiO2 layers.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The optical waveguide structure employs a composite configuration combining SiO2 layers and an air layer. This composite structure leverages the low refractive index of air for enhanced light confinement while using SiO2 layers for mechanical support and CMOS process compatibility, achieving both performance and manufacturability.

Inventive Principle:
Principle #40Composite materials

3Reliability

If a thick SiO2 layer of 2 μm is used for light confinement, then light leakage prevention is improved, but the integration with digital circuits on the same substrate becomes difficult

Engineering Contradiction:
Improvelight leakage preventionVSAvoidintegration with digital circuits
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The SiO2 layer is segmented vertically into thin and thick portions, allowing the thin lower layer to maintain compatibility with digital circuit fabrication processes while the thick upper layer provides sufficient thickness for preventing light leakage from optical waveguides.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution transitions from a single-dimensional thickness parameter to a multi-dimensional layered structure. By distributing the thickness requirement across different vertical layers rather than using a uniformly thick layer, the structure simultaneously satisfies both optical confinement requirements and CMOS process compatibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution allows for efficient light propagation and integration of optical circuits with digital circuits on the same substrate, reducing propagation loss and enabling high-performance optical communication by effectively confining light within the optical waveguide, thus meeting the demands of exascale computing.

Implementation Method 1

an optical leakage preventing layer formed inside the SOI substrate on a bottom side of the optical waveguide to prevent leakage of light from inside the optical waveguide towards the SOI substrate

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Data Source

PatentUS9523816B2Optical device and manufacturing method therefor
Publication Date: 2016.12.20 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US9523816B2 patent drawing
  • US9523816B2 patent drawing
  • US9523816B2 patent drawing

AI summary

An optical device includes an SOI substrate, the embedded insulating layer having a thickness of 200 nanometers (nm) or less; an optical waveguide comprising a Group III-V compound semiconductor material formed on top of the SOI substrate; and an optical leakage preventing layer formed inside the SOI substrate on a bottom side of the optical waveguide to prevent leakage of light from inside the optical waveguide towards the SOI substrate.