Patterned Etch-Stop Layer for SOI Substrate Dislocation Control
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Solution Overview
Problem
The existing manufacturing methods for SOI substrates result in high-density threading dislocations when a heteroepitaxial layer is grown due to lattice mismatch and thermal mismatch between the silicon layer and the heteroepitaxial layer, affecting the performance and reliability of photoelectric devices.
Innovation Solution
A patterned etch-stop layer is formed in the oxide layer of a first silicon substrate, bonded with a second silicon substrate, and a part of the first substrate is peeled off to create a patterned SOI substrate, allowing for the growth of a heteroepitaxial layer without threading dislocations through precise etching and bonding techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a heteroepitaxial layer is grown on a silicon layer of an SOI substrate, then photoelectric device functionality is achieved, but lattice mismatch and thermal mismatch cause high-density threading dislocations
Solution Approach 1:
The patent divides the interface between silicon and heteroepitaxial layer into multiple discrete islands rather than a continuous interface. This segmentation into isolated growth regions prevents the propagation of threading dislocations across the entire structure, allowing heteroepitaxial growth while maintaining low dislocation density.
Solution Approach 2:
The patent creates regions with different properties: isolated islands where heteroepitaxial growth occurs and surrounding areas where it does not. This local differentiation allows the heteroepitaxial layer to be grown only in specific locations where it is needed, avoiding the formation of threading dislocations in other regions.
2Reliability
If conventional SOI substrate manufacturing is used, then dielectric isolation and low-power circuit performance are achieved, but threading dislocations reduce photoelectric device reliability
Solution Approach 1:
The patent performs preliminary patterning of the oxide layer to create isolated islands before heteroepitaxial growth. This preliminary action defines the exact locations where heteroepitaxial material will grow, ensuring that dislocations are confined to isolated regions and do not propagate through the device structure.
Solution Approach 2:
The patterned oxide layer acts as an intermediary structure that controls the heteroepitaxial growth process. By creating isolated islands in the oxide layer, it mediates between the silicon substrate and the heteroepitaxial layer, allowing growth in controlled locations while preventing dislocation propagation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves the usage performance and reliability of photoelectric devices by reducing threading dislocations and enhancing the integration of heteroepitaxial layers on silicon substrates, aligning with the requirements for deep-submicron, low-voltage, and low-power consumption integrated circuits.
Implementation Method 1
bonding a surface, having the patterned etch-stop layer, of the first silicon substrate with a silicon surface of a second silicon substrate
Data Source
AI summary
An SOI substrate manufacturing method and an SOI substrate are provided, where the method includes: forming a patterned etch-stop layer in an oxide layer of a first silicon substrate, bonding a surface, having the patterned etch-stop layer (130), of the first silicon substrate with a surface of a second silicon substrate, and peeling off a part of the first silicon substrate to form a patterned SOI substrate.


