SOI Peripheral Die Bonded to Memory Substrate

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Solution Overview

Problem

The performance of three-dimensional memory devices is degraded due to the incorporation of peripheral circuitry on the same die as the memory elements, leading to high temperature processes that affect CMOS devices, necessitating a method to enhance memory device performance by bonding a memory die to a support die with peripheral circuitry on a semiconductor-on-insulator (SOI) substrate.

Innovation Solution

A method is provided for forming bonded assemblies by bonding a semiconductor die with SOI substrate-based peripheral circuitry to a memory die, removing the bulk substrate to expose the backside for external electrical connections, and forming conductive connections via structures through the insulating material layer, enabling scalable bonding of multiple memory dies to a support die.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If peripheral circuitry is incorporated on the same die as memory elements, then device integration is improved, but memory device performance is degraded due to high temperature processes affecting CMOS devices

Engineering Contradiction:
Improvedevice integrationVSAvoidmemory device performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The device is divided into two separate dies: a first die containing memory elements and a second die containing peripheral circuitry on an SOI substrate. This segmentation allows each die to be optimized for its specific function, with the peripheral circuitry die able to withstand high temperature processes without degrading memory element performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The peripheral circuitry is extracted from the memory die and placed on a separate support die with SOI substrate. This extraction enables the peripheral circuitry to undergo high temperature processing independently, removing the harmful thermal effects from the memory elements while maintaining functional integration through bonding.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of operation

If bulk substrate layer is removed from SOI substrate to expose insulating material layer, then external electrical connections are enabled, but additional processing steps are required

Engineering Contradiction:
Improveexternal electrical connectionsVSAvoidprocessing steps
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The bulk substrate removal is performed as a preliminary action during the fabrication process, exposing the insulating material layer and bonding pads before final assembly. This preliminary preparation simplifies subsequent bonding and connection operations, as the bonding surfaces are already exposed and ready for external electrical connections.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10903164B2Bonded assembly including a semiconductor-on-insulator die and methods for making the same
Publication Date: 2021.01.26 SANDISK TECHNOLOGIES LLC
  • US10903164B2 patent drawing
  • US10903164B2 patent drawing
  • US10903164B2 patent drawing

AI summary

A first semiconductor die is provided, which includes a first substrate, first semiconductor devices, first interconnect-level dielectric material layers, first metal interconnect structures, and first bonding pads. A second semiconductor die is provided, which includes a semiconductor-on-insulator (SOI) substrate, second semiconductor devices, second interconnect-level dielectric material layers, second metal interconnect structures, and second bonding pads. The second bonding pads are bonded to the first bonding pads. A bulk substrate layer of the SOI substrate is removed exposing an insulating material layer of the SOI substrate, which may be retained or also removed. An external bonding pad is electrically connected to a node of the second semiconductor devices.