SOI RF Filter Integration With Vias for Low-Loss Compact Layouts
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Solution Overview
Problem
Existing radio-frequency (RF) filters on silicon-on-insulator (SOI) substrates face challenges in minimizing signal degradation and reducing the overall footprint and volume of RF devices.
Innovation Solution
The implementation of a radio-frequency (RF) device with a silicon die featuring a silicon-on-insulator (SOI) substrate, where a plurality of vias provide electrical connections between the sides of the silicon die, and at least one RF flip chip is mounted on one side, incorporating filters such as SAW or BAW filters in communication with an RF circuit that includes a switch circuit and passive components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If RF filters are positioned close to RF circuits on SOI substrate, then signal loss is reduced and device efficiency is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent combines multiple RF components (filters, amplifiers, switches) and interconnect structures onto a single SOI substrate, creating an integrated RF device. This merging reduces the physical distance between components, minimizing signal loss while consolidating what would otherwise be separate discrete components into one unified device structure.
Solution Approach 2:
The patent implements a multi-layered substrate structure where different functional layers are stacked and interconnected through vias. The RF circuits, filters, and interconnect structures are nested within and across multiple substrate layers, allowing close proximity positioning that reduces signal loss while organizing complexity in a structured hierarchical manner.
2Area of stationary object
If multiple RF components are integrated on a single SOI substrate, then the overall footprint and volume of RF devices are minimized, but manufacturing precision requirements increase
Solution Approach 1:
The patent divides the RF device into distinct functional modules (filter sections, amplifier sections, switch sections) that are separately fabricated on different regions or layers of the SOI substrate. Each module can be optimized and manufactured independently with standard precision requirements, then integrated together to achieve compact overall footprint without requiring ultra-precise monolithic fabrication.
Solution Approach 2:
The patent utilizes multiple substrate layers stacked in the vertical dimension to accommodate multiple RF components. By transitioning from a two-dimensional layout to a three-dimensional stacked architecture, the device achieves reduced footprint area while each layer can be manufactured with conventional precision standards, avoiding the need for extremely precise single-layer integration.
3Reliability
If vias are used to provide electrical connections between sides of the silicon die, then parasitics are reduced and performance is enhanced, but device complexity and fabrication difficulty increase
Solution Approach 1:
The patent incorporates via structures during the initial substrate fabrication process rather than adding them as separate post-fabrication steps. The vias are formed as part of the layered substrate construction, with conductive material deposited and patterned alongside the RF circuits and interconnect structures. This preliminary integration reduces subsequent assembly complexity while achieving the performance benefits of low-parasitic connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces signal loss, minimizes the footprint and volume of RF devices, and enhances performance by positioning filters close to the RF circuits on the SOI substrate, thereby reducing parasitics and improving overall device efficiency.
Implementation Method 1
a plurality of vias, with each via configured to provide an electrical connection between the first side and the second side of the silicon die
Implementation Method 2
The RF flip chip can include an RF filter. The RF filter can be a surface acoustic wave (SAW) filter or a bulk acoustic wave (BAW) filter
Implementation Method 3
The RF filter can be a surface acoustic wave (SAW) filter or a bulk acoustic wave (BAW) filter
Data Source
AI summary
Devices and methods related to radio-frequency (RF) filters on silicon-on-insulator (SOI) substrate. In some embodiments, an RF device can include a silicon die such as an SOI die including a first side and a second side. The silicon die can further include a plurality of vias, with each via configured to provide an electrical connection between the first side and the second side of the silicon die. The RF device can further include at least one RF flip chip mounted on the first side of the silicon die. The silicon die can include, for example, an RF circuit such as a switch circuit, and the RF flip chip can include, for example, a filter such as a surface acoustic wave (SAW) filter.