SOI RF Switch Biasing for Low-Loss High-Linearity Switching
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Solution Overview
Problem
Conventional silicon-based RF/microwave switches suffer from high insertion loss, low compression, and poor linearity due to substrate parasitic effects, and GaAs-based switches are costly. Additionally, depletion-mode GaAs FETs experience gate current flow and lack complementary devices, leading to increased power consumption and die area costs.
Innovation Solution
A circuit design incorporating a first RF switch with a shunt switch and a controller providing control signals to bias the switch and shunt switch between ON and OFF modes, utilizing silicon-on-insulator technology to reduce substrate parasitic effects and enhance performance, while maintaining low manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional silicon-based RF/microwave switches are used, then manufacturing costs are low, but insertion loss is high and linearity is poor
Solution Approach 1:
The patent changes the substrate material parameter from conventional silicon to silicon-on-insulator (SOI), which fundamentally alters the electrical characteristics by introducing an insulating layer that eliminates substrate parasitic effects. This parameter change resolves the contradiction by enabling low insertion loss while maintaining compatibility with standard CMOS manufacturing processes, thus keeping manufacturing costs low.
Solution Approach 2:
The patent employs a composite structure using silicon-on-insulator technology, which combines silicon active layers with an insulating substrate layer. This composite material approach allows the switch to achieve superior electrical performance (low insertion loss, high linearity) while remaining manufacturable through adapted CMOS processes, resolving the cost-performance contradiction.
2Loss of energy
If depletion-mode GaAs FETs are used, then insertion loss is low, but gate current flows and power consumption increases
Solution Approach 1:
The patent changes the device operating mode parameter from depletion-mode to enhancement-mode FET operation. This parameter change eliminates gate current flow while maintaining low insertion loss, directly resolving the contradiction between energy loss and power consumption by achieving both low insertion loss and zero gate current.
3Loss of energy
If depletion-mode GaAs FETs are used, then insertion loss is low, but complementary devices are absent and die area increases
Solution Approach 1:
The patent changes the device type parameter from depletion-mode FET to enhancement-mode FET, which enables the use of complementary CMOS device pairs (n-channel and p-channel). This parameter change allows implementation of compact switch designs using complementary devices, reducing die area while maintaining low insertion loss performance.
Solution Approach 2:
The patent merges the functions of complementary n-channel and p-channel FETs in a unified enhancement-mode CMOS switch design. This merging allows for more efficient space utilization and reduced die area compared to depletion-mode designs, while achieving comparable or superior electrical performance.
4Ease of manufacture
If conventional biasing is used in silicon CMOS switches, then manufacturing is simple, but substrate parasitic effects degrade performance
Solution Approach 1:
The patent changes the substrate structure parameter from conventional silicon to silicon-on-insulator, which fundamentally alters the parasitic characteristics. This parameter change eliminates substrate parasitic effects that degrade linearity, while the enhanced-mode FET operation maintains compatibility with standard CMOS manufacturing, thus resolving the contradiction between manufacturing simplicity and performance reliability.
Data Source
AI summary
A method for controlling a switch based on transistors is disclosed. A switching circuit for switching a signal from an input port to an output port thereof is provided. A shunting circuit for switchably shunting the signal from the input port to ground is also provided. A control signal is generated for biasing a control port of the shunting circuit and an approximately complimentary control signal is generated for biasing of the switching circuit to either shunt a signal received at the input port or to switch the signal to the output port. A further bias signal for biasing a port within the switching circuit along the signal path between the input port and the output port is also provided.