SOI RF Switch Conductive Via for Isolation

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Solution Overview

Problem

In semiconductor-on-insulator (SOI) substrates, secondary capacitive coupling between radio frequency (RF) switch semiconductor devices is significant due to high frequency RF signals, leading to signal loss and spurious RF signal introduction during the off-state, caused by an induced charge layer with a long RC time constant.

Innovation Solution

A conductive via structure is formed from an interconnect-level metal line through a middle-of-line (MOL) dielectric layer, shallow trench isolation, and buried insulator layer to the bottom semiconductor layer, providing a low resistance electrical path for discharging the induced charge layer, thereby reducing capacitive coupling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If high voltage signals are applied to top semiconductor layer devices, then RF switch functionality is achieved, but significant capacitive coupling is induced to the bottom semiconductor layer

Engineering Contradiction:
Improvevoltage in top semiconductor layerVSAvoidcapacitive coupling to bottom semiconductor layer
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful effect of high voltage-induced capacitive coupling into a beneficial discharge mechanism. The induced charge layer, initially harmful, is now deliberately discharged through the conductive via structure to ground, transforming the harmful coupling effect into a controlled charge dissipation process that improves isolation.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the electrical parameter state of the bottom semiconductor layer by providing a discharge path that maintains it at a constant voltage (typically ground). This parameter change prevents the bottom layer from accumulating varying charges that would cause secondary capacitive coupling, while allowing the top layer to operate with high voltage swings.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If the induced charge layer is allowed to accumulate charges, then capacitive coupling occurs, but the long RC time constant prevents rapid discharge within the RF frequency period

Engineering Contradiction:
Improvecharge in induced charge layerVSAvoiddischarge speed of induced charge layer
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent applies preliminary action by pre-establishing the conductive via discharge path before the RF signal induces charges. This pre-configured path ensures that when charges are induced, they can be rapidly discharged within the RF frequency period, preventing the buildup of harmful capacitive coupling rather than addressing it after the fact.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces secondary capacitive coupling between semiconductor devices, enhancing signal isolation during the off-state of the RF switch by rapidly discharging the induced charge layer within the RF frequency period.

Implementation Method 1

providing a low resistance electrical path for discharging the induced charge layer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

reduces secondary capacitive coupling between semiconductor devices

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS8866226B2SOI radio frequency switch with enhanced electrical isolation
Publication Date: 2014.10.21 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US8866226B2 patent drawing
  • US8866226B2 patent drawing
  • US8866226B2 patent drawing

AI summary

At least one conductive via structure is formed from an interconnect-level metal line through a middle-of-line (MOL) dielectric layer, a shallow trench isolation structure in a top semiconductor layer, and a buried insulator layer to a bottom semiconductor layer. The shallow trench isolation structure laterally abuts at least two field effect transistors that function as a radio frequency (RF) switch. The at least one conductive via structure and the at interconnect-level metal line may provide a low resistance electrical path from the induced charge layer in a bottom semiconductor layer to electrical ground, discharging the electrical charge in the induced charge layer. The discharge of the charge in the induced charge layer thus reduces capacitive coupling between the semiconductor devices and the bottom semiconductor layer, and thus secondary coupling between components electrically disconnected by the RF switch is reduced.