SOI Semiconductor Sensor Recessed Diaphragm Stress Management
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Solution Overview
Problem
Existing semiconductor pressure sensors using silicon on insulator (SOI) wafers face issues with diaphragm thickness variations and stress concentration due to etching processes, leading to potential cracking and sensitivity variations.
Innovation Solution
A semiconductor sensor design featuring a recessed diaphragm with an insulating layer covering the outer circumference, reducing thermal expansion differences and stress concentration, while maintaining uniform film thickness and avoiding bottom surface etching, which enhances resistance to breakage and sensitivity stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the bottom surface of the diaphragm is etched to remove the insulating layer completely, then temperature characteristics improve and cracking is prevented, but etching depth variations occur leading to diaphragm thickness non-uniformity
Solution Approach 1:
The insulating layer is selectively removed only from the bottom surface of the diaphragm in the sensitive region, while leaving it intact in other areas. This partial extraction eliminates the harmful thermal expansion difference in the critical area without requiring complete removal that would cause thickness variations
Solution Approach 2:
The insulating layer is removed locally only in the sensitive region of the diaphragm where it causes problems, while maintaining it in non-sensitive areas. This localized treatment addresses the specific problem area without affecting the overall diaphragm uniformity
2Reliability
If a depression is dug on the bottom surface of the diaphragm, then the insulating layer is completely removed, but stress concentrates on the corner causing diaphragm breakage
Solution Approach 1:
Instead of creating a depression with harmful stress-concentrating corners, the invention uses a flat bottom surface that converts the potential harm of corner stress into a beneficial uniform stress distribution, while still achieving crack prevention through selective insulating layer removal
3Ease of manufacture
If time management is used to control etching depth, then the insulating layer can be removed, but various variable factors in the etching process lead to depth variations
Solution Approach 1:
The invention replaces the time-based etching control mechanism with a structural design approach. Instead of relying on precise temporal control of the etching process, the solution uses the inherent properties of the SOI wafer structure and selective etching to achieve the desired result, making the process less sensitive to variable factors
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves the semiconductor sensor's resistance to breakage and reduces sensitivity variations by minimizing thermal expansion effects and stress concentration, while allowing for efficient manufacturing with controlled etching processes.
Implementation Method 1
the insulating layer 12 in the cavity 14 is removed, and further the bottom surface of the diaphragm 15 is also etched such that the depression 17 is dug down. Thereby the insulating layer 12 is completely removed.
Implementation Method 2
Stress is likely to concentrate on the corner when the diaphragm is deformed. There has been a possibility that the diaphragm is broken from the corner.
Data Source
AI summary
A semiconductor sensor has a first semiconductor layer as a base, an insulating layer formed on the first semiconductor layer, and a second semiconductor layer formed on the insulating layer. A recess is formed from a bottom surface of the first semiconductor layer up to a top surface of the insulating layer. The second semiconductor layer is covered with the insulating layer in an outer circumference of a top surface of the recess. A sensitive region of the second semiconductor layer is exposed in a region except the outer circumference of the top surface of the recess.


