SOI SRAM Substrate Contacts Suppress Floating-Body Effects
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Solution Overview
Problem
Conventional silicon-on-insulator (SOI) static random access memory (SRAM) devices are limited by floating-body effects, which require higher minimum operating voltages due to charge modulation in the semiconductor film, leading to increased power consumption and reduced performance.
Innovation Solution
The introduction of a plurality of substrate contacts in both the peripheral and memory regions of the SOI SRAM device, electrically connected to the semiconductor substrate, provides a fixed voltage bias to suppress floating-body effects, thereby reducing the minimum operating voltage required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If substrate contacts are added in memory region, then floating-body effect is reduced, but device complexity increases
Solution Approach 1:
The substrate contacts are segmented into two distinct groups: first substrate contacts positioned in the peripheral region and second substrate contacts positioned in the memory region. This segmentation allows the patent to address floating-body effects in different areas with appropriately placed contacts, reducing the need for a uniform dense contact pattern across the entire device while maintaining effectiveness.
Solution Approach 2:
Different regions of the device are provided with different contact configurations - the peripheral region receives first substrate contacts while the memory region receives second substrate contacts. This local differentiation optimizes floating-body effect suppression for each specific region's requirements without unnecessarily complicating areas where fewer contacts are needed.
2Use of energy by moving object
If more substrate contacts are used, then minimum operating voltage is reduced, but manufacturing complexity increases
Solution Approach 1:
By dividing substrate contacts into two groups located in different regions (peripheral and memory), the patent achieves effective floating-body suppression without requiring a uniform high-density contact pattern across the entire chip, thereby reducing overall manufacturing complexity while maintaining low operating voltage.
Solution Approach 2:
The patent applies different contact strategies to different regions - peripheral contacts for general substrate biasing and memory region contacts for localized floating-body control - optimizing the balance between operating voltage reduction and manufacturing ease by placing contacts only where most needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of substrate contacts significantly reduces the floating-body effects, resulting in lower minimum operating voltages and improved performance by stabilizing the semiconductor film potential, enhancing the overall efficiency and speed of the SRAM device.
Implementation Method 1
The performance of conventional SOI SRAM devices is limited by so-called floating-body effects. For example, in an SOI SRAM device including transistor 100, semiconductor film 108, which constitutes a body region of transistor 100, is electrically isolated. Accordingly, the potential of semiconductor film 108 is floating and may be modulated through charging or discharging of the charges in semiconductor film 108.
Data Source
AI summary
A memory device is formed on a semiconductor-on-insulator (SOI) structure, the SOI structure including a substrate, an insulating layer on the substrate, and a semiconductor film on the insulating layer. The memory device includes a memory array in a memory region of the SOI structure, a plurality of first substrate contacts in the peripheral region of the memory device, and a plurality of second substrate contacts in the memory region of the SOI structure, wherein the first substrate contacts and the second substrate contacts are formed in and over the semiconductor film and in the insulating layer and are electrically connected to the substrate of the SOI structure.