SOI Fabrication Step Difference Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor devices with SOI substrates face a step difference issue between cell and peripheral areas due to the formation and removal of sacrificial layers, leading to uneven heights and potential defects.

Innovation Solution

A method involving the formation of a first insulating layer in the peripheral area, reduction of substrate height through pre-cleaning and pre-baking, selective growth of a sacrificial SiGe layer in the cell area using the insulating layer as a growth prevention layer, and subsequent formation of semiconductor layers to minimize step differences and prevent defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a sacrificial layer is formed in the entire region and removed from the peripheral area, then the sacrificial layer can be selectively removed to form the desired structure, but a step difference is created between the cell area and peripheral area

Engineering Contradiction:
Improveselective sacrificial layer removalVSAvoidstep difference between areas
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

A first insulating layer is formed in the peripheral area before the sacrificial layer formation step. This preliminary action ensures that when the sacrificial layer is subsequently removed from the peripheral area, the insulating layer remains to prevent step difference formation, while the cell area maintains its intended structure without such interference.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the cell area has a higher height than the peripheral area after processing, then the selective sacrificial layer removal is achieved, but the uneven height causes potential defects and fabrication issues

Engineering Contradiction:
Improvedefect preventionVSAvoiduneven height between areas
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The first insulating layer acts as an intermediary substance in the peripheral area. It mediates between the sacrificial layer removal process and the substrate, preventing direct contact that would create step differences and potential defects, while allowing the cell area to maintain its required height profile.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Shape

If the sacrificial layer is formed only in the cell area, then the peripheral area remains flat, but the sacrificial layer cannot be selectively formed without affecting the entire region

Engineering Contradiction:
Improveflat peripheral areaVSAvoidselective sacrificial layer formation
Core Design Contradiction:
ShapeVSEase of manufacture

Solution Approach 1:

The substrate is segmented into two functional regions: the cell area where the sacrificial layer is formed and removed, and the peripheral area where the first insulating layer is formed to maintain flatness. This segmentation allows each region to be optimized independently for its specific function while avoiding the step difference problem.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces step differences between cell and peripheral areas, enabling smoother growth of semiconductor layers and preventing defects, thereby improving the fabrication process of semiconductor devices with SOI substrates.

Implementation Method 1

selectively forming a sacrificial layer in the second area using the first insulating layer as a growth prevention layer

Methodology Applied
Scientific EffectPhysical barrier (insulating layer):

Implementation Method 2

lowering a height of the semiconductor substrate in a second area and a height of the first insulating layer in the first area

Methodology Applied
Scientific EffectThermal processing: Heat Treatment

Data Source

PatentUS8921208B1Method for fabricating semiconductor device
Publication Date: 2014.12.30 MIMIRIP LLC
  • US8921208B1 patent drawing
  • US8921208B1 patent drawing
  • US8921208B1 patent drawing

AI summary

A method for fabricating a semiconductor device includes forming a first insulating layer in a first area of the semiconductor substrate, lowering a height of the semiconductor substrate in a second area and a height of the first insulating layer in the first area, selectively forming a sacrificial layer in the second area using the first insulating layer as a growth prevention layer, and forming a first semiconductor layer on the semiconductor substrate including the sacrificial layer.