Local Strain Generation in SOI Substrates via Stencil Amorphization
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Solution Overview
Problem
Existing methods for creating strained channel transistors on semiconductor on insulator substrates, such as the Stress Memorization Technique (SMT), face challenges, particularly for transistors with long gate lengths, as they struggle to impose strain uniformly across the channel zone due to the dependence of the amorphized zone dimensions on the gate dimensions.
Innovation Solution
A method involving the formation of a stencil on the surface layer to selectively amorphize and recrystallize regions of the support layer, creating dislocations that induce mechanical strain in the channel zone before gate formation, allowing for more precise control over strain distribution and intensity, independent of gate dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the Stress Memorization Technique (SMT) is used to strain the channel zone, then the mobility of carriers is improved, but the strain distribution becomes non-uniform for transistors with long gate lengths
Solution Approach 1:
The patent segments the amorphization process by introducing a stencil that defines specific regions for amorphization. Instead of amorphizing the entire support layer, only selected regions are amorphized and subsequently recrystallized to generate dislocations. This segmentation allows precise control over where strain is applied, ensuring uniform strain distribution across the channel zone even for long gate length transistors.
Solution Approach 2:
The patent introduces a stencil as an intermediary element that mediates between the amorphization process and the final strain distribution. The stencil controls the spatial extent of amorphization, acting as a mask that defines the regions where dislocations will be generated. This intermediary enables precise control over strain localization and uniformity without being present in the final device structure.
2Manufacturing precision
If the amorphized zone dimensions are made dependent on gate dimensions, then the strain can be applied to the channel zone, but it becomes difficult or impossible to impose strain at the centre of the transistor channel zone for long gate lengths
Solution Approach 1:
The patent applies local quality by using a stencil to create spatially varying regions of amorphization. The stencil allows different regions of the support layer to have different properties (amorphized vs. crystalline), with the amorphized regions strategically positioned to generate dislocations that produce uniform strain across the channel zone. This local differentiation enables precise strain control independent of gate length.
Solution Approach 2:
The patent performs preliminary action by forming the stencil and defining the amorphization regions before gate formation. The stencil is used during the amorphization process to pre-establish the spatial pattern of dislocation generation. This preliminary structuring ensures that when the gate is later formed, the strain is already uniformly distributed across the channel zone, making the process adaptable to various gate lengths.
3Reliability
If dislocations are generated in the support layer to induce mechanical strain, then carrier mobility is enhanced, but the process becomes complex with multiple steps including amorphization, stressor layer deposition, and recrystallisation
Solution Approach 1:
The patent applies universality by making the stencil serve multiple functions: it acts as a mask during amorphization to define the spatial pattern, and subsequently as a stressor layer during recrystallization to generate the mechanical strain. By combining these two functions into a single element, the patent reduces the number of separate process steps and materials required, simplifying the overall fabrication process while maintaining the ability to generate uniform strain for enhanced carrier mobility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables improved strain application in the channel zone, enhancing transistor performance by increasing the density and distribution of dislocations, which can lead to better carrier mobility and current performance, especially for transistors with larger gate lengths.
Implementation Method 1
amorphisation by ionic implantation of the semiconducting material in the source zone 1 and drain zone 2 of a transistor T
Implementation Method 2
A recrystallisation annealing of the source zone 1 and the drain zone 2 is then done
Implementation Method 3
A stressor layer 8 is then deposited based on a material with an intrinsic mechanical strain such as silicon nitride (SixNy) on the source and drain zones
Implementation Method 4
These dislocations induce a mechanical strain in the material that can propagate as far as the channel zone 3
Data Source
AI summary
Method to strain a channel zone of a transistor of the semiconductor on insulator type transistor that makes use of an SMT stress memorization technique in which regions located under the insulation layer of the substrate (FIG. 6) are amorphized, before the transistor gate is made.