SOI Stress Control via Rear Face Counterweight Layer

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Solution Overview

Problem

The manufacturing of semiconductor-on-insulator (SOI) structures with thick buried insulators faces challenges in controlling stress-induced deformation, which can lead to significant deflection and handling issues during photolithographic steps and wafer handling, especially when the rear face oxide is partially removed, causing increased deformation amplitudes.

Innovation Solution

A method involving the application of a distinct material withstanding deoxidations on the rear face of the supporting substrate, which compensates for the stress exerted by the buried insulator and is protected from etching, ensuring minimal deformation by maintaining a controlled thickness difference between insulator layers on the front and rear faces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a thick buried insulator is formed in SOI structures, then the insulator thickness is increased, but the deformation of the SOI substrate increases significantly

Engineering Contradiction:
Improveburied insulator thicknessVSAvoidSOI substrate deformation
Core Design Contradiction:
Volume of moving objectVSShape

Solution Approach 1:

The patent applies the counterweight principle by forming an additional insulating layer on the rear face of the supporting substrate to compensate for the stress-induced deformation caused by the thick buried insulator on the front face. This rear insulating layer acts as a counterbalancing element that offsets the differential thermal expansion stresses, thereby reducing the overall substrate deformation while maintaining the desired thick buried insulator configuration.

Inventive Principle:
Principle #8Anti-weight (Counterweight)

2Shape

If specific equipment and methods are used to manufacture thick buried oxide SOIs, then the deformation is controlled, but the manufacturing cost and complexity increase

Engineering Contradiction:
Improvedeflection controlVSAvoidmanufacturing equipment and process complexity
Core Design Contradiction:
ShapeVSDevice complexity

Solution Approach 1:

The patent applies the universality principle by using the same supporting substrate for both front and rear face insulator formation processes. The supporting substrate serves multiple functions: as the mechanical support during bonding, as the substrate for forming the front face buried insulator, and as the substrate for forming the rear face compensating insulator. This multi-functional approach eliminates the need for separate receiver substrates and complex selective deoxidation equipment, thereby reducing manufacturing complexity while maintaining deformation control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for precise management of deformation in SOI structures, reducing deflection to near zero and ensuring the insulating layer on the rear face is protected throughout the manufacturing process, thereby improving the structural integrity and handling of SOI wafers.

Implementation Method 1

the structure is not symmetrical and deforms because the oxide does not have the same heat expansion coefficient as silicon

Methodology Applied
Scientific EffectThermal expansion coefficient difference: Thermal Expansion

Implementation Method 2

a distinct material withstanding deoxidations, a material which, in combination with this insulating layer on the rear face of the supporting substrate, at least partly compensates for the stress exerted by the buried insulator

Methodology Applied
Scientific EffectEtching resistance:

Implementation Method 3

with bonding by molecular adhesion it is possible to make substrates of the SOI (Silicon On Insulator) type

Methodology Applied
Scientific EffectMolecular adhesion: Adhesive

Data Source

PatentEP2494593B1Method for controlling the distribution of stresses in a semiconductor-on-insulator type structure and corresponding structure.
Publication Date: 2013.11.06 SOITEC SA
  • EP2494593B1 patent drawingFigure 1~4
  • EP2494593B1 patent drawingFigure 5A~5J

AI summary

The present invention relates to a method for controlling the distribution of the stresses in a structure of the semiconductor-on-insulator type during its manufacturing, which includes a thin layer of semiconducting material (3) on a supporting substrate (1), an insulating layer (2, 4) being present on each of the front and rear faces of the supporting substrate (1), the insulating layer on the front face (2) forming at least one portion of a thick buried insulator (BOX), a manufacturing method according to which it is proceeded with adhesive bonding of said thin layer (3) on said supporting substrate (1), characterized by the fact that, prior to adhesive bonding, it is proceeded with covering of the insulating layer (4), on the rear face of said supporting substrate with a distinct material (5), withstanding deoxidations, a material which, in combination with this insulating layer (4) on the rear face of the supporting substrate (1), at least partly compensates for the stress exerted by the buried insulator (BOX) on the supporting substrate (1).